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| Data Sheet April 2000 L8560 Low-Power SLIC with Ringing Features s s Description The L8560 full-feature, low-power subscriber line interface circuit (SLIC) is optimized for low power consumption while providing an extensive set of features. This part is ideal for ISDN terminal adapter applications and short-loop, power-sensitive applications such as pair gain and cable telephony. This part is also designed for PBX, DLC, or CO applications. The SLIC includes an auxiliary battery input and a battery switch. In short-loop applications, SLICs can be used in high battery to present a high on-hook voltage, and then switched to low battery to reduce off-hook power. To help minimize the required auxiliary battery voltage, the dc feed resistance and overhead voltage are set at 55 and 6.7 V, respectively. This allows an undistorted on-hook transmission of a 3.14 dBm signal into a 900 loop impedance. The device offers the reverse battery function. Using the reverse battery, the device can provide a balanced power ring signal to tip and ring. In this mode of operation, the battery switch is used to apply a high-voltage battery during ringing and a lower-voltage battery during the talk and idle states. Also included in the L8560 is a dc current-limit switch, which increases the dc current limit during power ringing. In addition, dc overhead voltage is reduced during the ring state. With the battery and current-limit switches, and overhead reduction, the L8560 can provide sufficient power to ring a true North American 5 REN load of 1386 + 40 F. The device offers ring trip and loop closure supervision with 0.3 V and 2 mA hysteresis, respectively. It also includes the ground start state and ring ground detection. A summing node for meter pulse injection to 2.2 Vrms is also included. The 44-pin PLCC version also has a spare uncommitted op amp, which may be used for ac gain setting or meter pulse filtering. Full-feature set for central office applications Also ideal for ISDN terminal adapters, pair gain, and cable telephony applications Auxiliary input for second battery, and internal switch to enable its use to save power in short telephone loops 5 V only operation or optional 5 V operation for reduced power consumption Low active power (85 mW typical) and scan power (61 mW typical) with 5 V only operation Low active power (68 mW typical with auxiliary battery) and scan power (45 mW typical) with 5 V operation Quiet tip/ring polarity reversal Per-line ringing available for short loops Reduced overhead and increased current limit during ring mode for lower-battery operation or increased ring loop length Supports meter pulse injection Distortion-free full duplex from 0 mA dc loop current on-hook transmission Convenient operating states: -- Forward powerup -- Polarity reversal powerup -- Forward sleep -- Ground start -- Disconnect Adjustable supervision functions: -- Off-hook detector with longitudinal rejection -- Ground key detector with longitudinal rejection -- Ring trip detector Independent, adjustable dc and ac parameters: -- dc feed resistance (44-pin PLCC version) -- Loop current limit -- Termination impedance Thermal protection s s s s s s s s s s s s s L8560 Low-Power SLIC with Ringing Data Sheet April 2000 Table of Contents Contents Page Contents Page Features .................................................................... 1 Description ................................................................. 1 Pin Information ........................................................... 6 Functional Description ................................................ 9 Absolute Maximum Ratings ..................................... 10 Recommended Operating Conditions ...................... 11 Electrical Characteristics .......................................... 11 Ring Trip Requirements ......................................... 16 Test Configurations .................................................. 17 Applications ............................................................. 19 Characteristic Curves............................................. 19 dc Applications ...................................................... 21 Battery Feed...................................................... 21 Overhead Voltage ............................................ 22 Adjusting Overhead Voltage ............................. 23 Adjusting dc Feed Resistance........................... 23 Adjusting Overhead Voltage and dc Feed Resistance Simultaneously.............................. 24 Loop Range....................................................... 24 Off-Hook Detection ........................................... 24 Ring Ground Detection...................................... 25 Longitudinal Balance.............................................. 25 Power Derating ..................................................... 25 Battery Switch ....................................................... 26 VCC/VEE Supplies ................................................... 27 Power Ringing ....................................................... 27 Ringing SLIC Balanced Ring Signal Generation ....................................................... 27 POTS for ISDN Terminal Adapters ................... 27 Power Ringing Load .......................................... 28 Crest Factor....................................................... 28 Current-Limit Switch .......................................... 29 Ring Trip............................................................ 29 Reference Designs for ISDN TA Applications ... 31 Design Considerations .......................................... 33 Unbalanced Bused Ring Signal Application ...... 33 Ring Trip Detection............................................ 33 ac Design .............................................................. 37 First-Generation Codecs ................................... 37 Second-Generation Codecs .............................. 37 Third-Generation Codecs .................................. 37 Design Examples ................................................... 39 Example 1, Real Termination ............................ 39 Example 2, Complex Termination ..................... 39 Example 3, Complex Termination Without Spare Op Amp ................................................. 39 Complex Termination Impedance Design Example Using L8560 Without Spare Op Amp ............................................................ 40 ac Interface Using First-Generation Codec ....... 40 Transmit Gain.................................................... 41 Receive Gain..................................................... 42 Hybrid Balance .................................................. 42 Blocking Capacitors........................................... 43 Outline Diagrams...................................................... 44 32-Pin PLCC ......................................................... 44 44-Pin PLCC ......................................................... 45 Ordering Information................................................. 46 2 Lucent Technologies Inc. Data Sheet April 2000 L8560 Low-Power SLIC with Ringing Table of Contents (continued) Figures Page Figure 32. Thevenin Equivalent Ring Trip Circuit for Balanced Ringing SLIC..................... 29 Figure 33. POTS Interface with Balanced Ringing Using L8560 SLIC and T8503 Codec .... 31 Figure 34. Ring Trip Equivalent Circuit and Equivalent Application ........................... 33 Figure 35. Basic Loop Start Application Circuit Using T7504 Codec and Bused Ringing................................................... 34 Figure 36. Ground Start Application Circuit .............. 35 Figure 37. ac Equivalent Circuit Not Including Spare Op Amp ....................................... 38 Figure 38. ac Equivalent Circuit Including Spare Op Amp.................................................. 38 Figure 39. Interface Circuit Using First-Generation Codec (Blocking Capacitors Not Shown) ................................................... 41 Figure 40. ac Interface Using First-Generation Codec (Including Blocking Capacitors) for Complex Termination Impedance ..... 43 Figure 1. Functional Diagram ..................................... 5 Figure 2. 32-Pin Diagram (PLCC Chip) ...................... 6 Figure 3. 44-Pin Diagram (PLCC Chip) ...................... 6 Figure 4. Ring Trip Circuits....................................... 16 Figure 5. Basic Test Circuit ...................................... 17 Figure 6. Metallic PSRR ........................................... 17 Figure 7. Longitudinal PSRR .................................... 17 Figure 8. Longitudinal Balance ................................. 18 Figure 9. RFI Rejection............................................. 18 Figure 10. Longitudinal Impedance .......................... 18 Figure 11. ac Gains .................................................. 18 Figure 12. L8560 Receive Gain and Hybrid Balance vs. Frequency .......................... 19 Figure 13. L8560 Transmit Gain and Return Loss vs. Frequency ........................................ 19 Figure 14. L8560 Typical VCC Power Supply Rejection ................................................ 19 Figure 15. L8560 Typical VBAT Power Supply Rejection ................................................ 19 Figure 16. Loop Closure Program Resistor Selection ................................................ 20 Figure 17. Ring Ground Detection Programming ..... 20 Figure 18. Loop Current vs. Loop Voltage................ 20 Figure 19. Loop Current vs. Loop Resistance .......... 20 Figure 20. L8560 Typical SLIC Power Dissipation vs. Loop Resistance............................... 21 Figure 21. Power Derating........................................ 21 Figure 22. Loop Current vs. Loop Voltage................ 21 Figure 23. SLIC 2-Wire Output Stage....................... 23 Figure 24. Equivalent Circuit for Adjusting the Overhead Voltage .................................. 23 Figure 25. Equivalent Circuit for Adjusting the dc Feed Resistance ............................... 23 Figure 26. Adjusting Both Overhead Voltage and dc Feed Resistance ............................... 24 Figure 27. Off-Hook Detection Circuit....................... 24 Figure 28. POTS Controlled from an ISDN Terminal Adapter ................................... 28 Figure 29. Ringing Waveform Crest Factor = 1.6 ..... 28 Figure 30. Ringing Waveform Crest Factor = 1.2 ..... 28 Figure 31. Equivalent Ring Trip Circuit for Balanced Ringing SLIC ......................... 29 Tables Page Table 1. L8560 Product Family Feature Summary ..... 4 Table 2. Pin Descriptions............................................ 7 Table 3. Input State Coding........................................ 9 Table 4. Supervision Coding ...................................... 9 Table 5. Power Supply ............................................. 12 Table 6. 2-Wire Port ................................................. 13 Table 7. Analog Pin Characteristics ......................... 14 Table 8. Uncommitted Op Amp Characteristics (44-Pin PLCC Only).......... 14 Table 9. ac Feed Characteristics .............................. 15 Table 10. Logic Inputs and Outputs.......................... 16 Table 11. Parts List for Balanced Ringing Using T8503 Codec .......................................... 32 Table 12. Parts List for Loop Start with Bused Ringing and Ground Start Applications .. 35 Table 13. 600 Design Parameters ........................ 37 Lucent Technologies Inc. 3 L8560 Low-Power SLIC with Ringing Data Sheet April 2000 The L8560DAU and L8560EP are available in the 32-pin and 44-pin PLCC packages and have feature sets identical to the L8560AAU and L8560AP, respectively, with the following modifications. These parts are graded as high longitudinal balance (63 dB), and have an additional logic state (scan with low battery) which allows for low on-hook power dissipation. The L8560FAU and L8560GP are available in the 32-pin and 44-pin PLCC packages and have feature sets identical to the L8560AAU and L8560AP, respectively, with the following modifications. These parts are graded for lower longitudinal balance (50 dB), and have an additional logic state (scan with battery) which allows for low on-hook power dissipation. Table 1 below summarizes the features in the L8560 product family. Description (continued) The L8560 product family is graded by different features, specifications, and package options. The L8560Axx is the basic full-feature SLIC that operates with 5 V and a battery supply, and is available in the 32-pin PLCC (AAU) package and the 44-pin PLCC package (AP). This part is graded as the 54 dB longitudinal balance part. Additional features (spare op amp and overhead voltage programming) are available in the 44-pin PLCC package. The L8560CAU is available only in the 32-pin PLCC package and has a feature set similar to the AAU version, except the CAU version requires +5 V, -5 V, and battery power supplies. With this option, power consumption is greatly reduced. Table 1. L8560 Product Family Feature Summary Feature 32-Pin PLCC 44-Pin PLCC 5 V Operation 5 V Operation (reduced power consumption) Operational VBAT1 (V) Battery Switch Balanced Ring Mode Adjustable Overhead Spare Op Amp Reverse Battery Scan Mode Scan Mode with Low Battery Longitudinal Balance (dB)* On-hook Transmission Ground Start Loop Start Ring Trip Detector Programmable Current Limit Thermal Protection L8560 AAU X NA X NA -70 X X NA NA X X NA 54 X X X X X X AP NA X X NA -70 X X X X X X NA 54 X X X X X X CAU X NA NA X -70 X X NA NA X X NA 54 X X X X X X DAU X NA X NA -70 X X NA NA X X X 63 X X X X X X EP NA X X NA -70 X X X X X X X 63 X X X X X X FAU X NA X NA -70 X X NA NA X X X 50 X X X X X X GP NA X X NA -70 X X X X X X X 50 X X X X X X * More information is provided in the Applications section of this document. 4 Lucent Technologies Inc. Data Sheet April 2000 L8560 Low-Power SLIC with Ringing Description (continued) VEE (OPTIONAL ON L8560C) SEE ENLARGED DETAIL BGND VBAT2 VBAT1 VBAT1 VBAT2 BS1 BS2 VCC AGND FB1 FB2 CF1 CF2 TG DCOUT VITR SN XMT 44-PIN PLCC ONLY 2 19.2 RCVN RCVP B0 B1 B2 BR NSTAT RGDET BATTERY SWITCH VBAT1 INTERNAL SWITCH DECISION VREG BATTERY SWITCH POWER CONDITIONING & REFERENCE RECTIFIER ENLARGED DETAIL - AX + VTX TXI 0.1 F CEXTERNAL - + PT A=4 SPARE OP AMP - PR A = -4 1 + 44-PIN PLCC ONLY dc RESISTANCE ADJUST BATTERY FEED STATE CONTROL DCR IPROG CURRENT-LIMIT ADJUST LOOP CLOSURE DETECTOR LCTH + - RTSP RTSN ICM RING TRIP DETECTOR RING GROUND DETECTOR + - 12-2569.c (F) Figure 1. Functional Diagram Lucent Technologies Inc. 5 L8560 Low-Power SLIC with Ringing Data Sheet April 2000 Pin Information VITR NC (L8560A/D/F) VEE (L8560C) NSTAT RCVP VTX TXI 4 RCVN FB2 FB1 LCTH DCOUT IPROG CF2 CF1 RTSN 5 6 7 8 9 10 11 12 3 2 1 32 31 30 29 28 27 26 TG BR B0 B1 B2 PR PT BS1 BS2 ICM 25 24 23 22 RGDET 32-PIN PLCC 21 13 14 15 16 17 18 19 20 VCC VBAT1 VBAT2 AGND BGND RTSP 12-2548.L (F) Figure 2. 32-Pin Diagram (PLCC Chip) DCOUT LCTH IPROG DCR XMT CF1 CF2 FB1 FB2 6 RTSN RTSP NC AGND NC VCC VBAT1 VBAT2 BGND RGDET ICM 7 8 9 10 11 12 13 14 15 16 5 4 3 2 1 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 NC SN RCVN RCVP VITR NC NSTAT TXI VTX TG NC NC-NTP NC 44-PIN PLCC 17 29 18 19 20 21 22 23 24 25 26 27 28 BS2 BS1 PT B2 B1 PR B0 NC NC NC BR 12-2548.f (F) Figure 3. 44-Pin Diagram (PLCC Chip) 6 Lucent Technologies Inc. Data Sheet April 2000 L8560 Low-Power SLIC with Ringing Pin Information (continued) Table 2. Pin Descriptions 32-Pin 44-Pin Symbol Type Description DCOUT O dc Output Voltage. This output is a voltage that is directly proportional to the 9 1 absolute value of the differential tip/ring current. IPROG I Current-Limit Program Input. A resistor to DCOUT sets the dc current limit of 10 2 the device. 11 3 CF2 -- Filter Capacitor 2. Connect a 0.1 F capacitor from this pin to AGND. 12 4 CF1 -- Filter Capacitor 1. Connect a 0.47 F capacitor from this pin to pin CF2. SN I Summing Node. The inverting input of the uncommitted operational amplifier. -- 5 A resistor or network to XMT sets the gain (44-pin PLCC only). XMT O Transmit ac Output Voltage. The output of the uncommitted operational -- 6 amplifier (44-pin PLCC only). RTSN I Ring Trip Sense Negative. Connect this pin to the ringing generator signal 13 7 through a high-value resistor. 8 RTSP I Ring Trip Sense Positive. Connect this pin to the ring relay and the ringer 14 series resistor through a high-value resistor. -- 9 NC -- No Connection. May be used as a tie point. 15 10 AGND -- Analog Signal Ground. -- 11 NC -- No Connection. May be used as a tie point. 16 12 VCC -- 5 V Power Supply. 17 13 VBAT1 -- Battery Supply. Negative high-voltage battery, higher in magnitude than VBAT2. 18 19 20 21 14 15 16 17 VBAT2 BGND RGDET ICM -- -- O I Auxiliary Battery Supply. Negative high-voltage battery, lower in magnitude than VBAT1, used to reduce power dissipation on short loops. Battery Ground. Ground return for the battery supply. Ring Ground Detect. When high, this open-collector output indicates the presence of a ring ground. To use, connect a 100 k resistor to VCC. Common-Mode Current Sense. To program ring ground sense threshold, connect a resistor to VCC and connect a capacitor to AGND to filter 50/60 Hz. If unused, the pin should be connected to ground. Battery Switch Slowdown. Connect a 0.22 F capacitor to pin BS1. Battery Switch Slowdown. Connect a 0.22 F capacitor to pin BS2. Also, connect a 0.1 F capacitor in series with a 100 resistor from BS1 to VBAT1 for stability. No Connection. May be used as a tie point. No Connection. May be used as a tie point. Protected Tip. The output of the tip driver amplifier and input to loop sensing. Connect to loop through overvoltage protection. Protected Ring. The output of the ring driver amplifier and input to loop sensing circuitry. Connect to loop through overvoltage protection. 22 23 18 19 BS2 BS1 -- -- -- -- 24 25 20 21 22 23 NC NC PT PR -- -- I/O I/O Lucent Technologies Inc. 7 L8560 Low-Power SLIC with Ringing Data Sheet April 2000 Pin Information (continued) Table 2. Pin Descriptions (continued) 32-Pin 44-Pin -- 24 25 26 27 28 29 -- -- -- 30 31 32 1 26 27 28 29 30 31 32 33 34 35 Symbol NC B2 B1 B0 BR NC NC-NTP NC TG VTX TXI NSTAT Type Description -- No Connection. May be used as a tie point. I I I I -- -- -- -- O -- O State Control Input. B0, B1, B2, and BR determine the state of the SLIC. See Table 3. Pin B2 has a 40 k pull-up. State Control Input. B0, B1, B2, and BR determine the state of the SLIC. See Table 3. Pin B1 has a 40 k pull-up. State Control Input. B0, B1, B2, and BR determine the state of the SLIC. See Table 3. Pin B0 has a 40 k pull-up. State Control Input. B0, B1, B2, and BR determine the state of the SLIC. See Table 3. Pin BR has a 40 k pull-up. No Connection. May be used as a tie point. No Connection. May not be used as a tie point. No Connection. May be used as a tie point. Transmit Gain. Connect a 4.32 k resistor from this pin to VTX. The voltage at this pin is directly proportional to the differential tip/ring current. ac/dc Separation. Connect a 0.1 F capacitor from this pin to VTX. Loop Detector Output/Ring Trip Detector Output. This output is a wiredOR of the NLC/NRDET outputs. When low, this logic output indicates that an off-hook condition exists or that ringing has been tripped. -5 V Power Supply L8560C. No Connection L8560A/D/F. May be used as a tie point. No Connection. May be used as a tie point. ac Output Voltage. This output is a voltage that is directly proportional to the differential ac tip/ring current. Receive ac Signal Input (Noninverting). This high-impedance input controls the ac differential voltage on tip and ring. Receive ac Signal Input (Inverting). This high-impedance input controls the ac differential voltage on tip and ring. No Connection. May be used as a tie point. Polarity Reversal Slowdown. Connect a capacitor to ground. Polarity Reversal Slowdown. Connect a capacitor to ground. Loop Closure Threshold Input. Connect a resistor to DCOUT to set offhook threshold. dc Resistance. Short to analog ground for dc feed resistance of 55 . The dc feed resistance can be increased to a nominal 760 by shorting DCR to DCOUT. Intermediate values can be set by a simple resistor divider from DCOUT to ground with the trip at DCR (44-pin PLCC only). 2 2 -- 3 4 5 -- 6 7 8 -- -- -- 36 37 38 39 40 41 42 43 44 VEE NC NC VITR RCVP RCVN NC FB2 FB1 LCTH DCR -- -- -- O I I -- -- -- I I 8 Lucent Technologies Inc. Data Sheet April 2000 L8560 Low-Power SLIC with Ringing Functional Description Table 3. Input State Coding B0 1 B1 1 B2 0 BR State/Definition 1 Powerup, Forward Battery VBAT2. Pin PT is positive with respect to pin PR. VBAT2 is applied to the tip/ring drive amplifiers. On-hook transmission capability. All supervision active--an off-hook condition or a ring trip causes output NSTAT to go low. 1 Powerup, Reverse Battery VBAT2. Pin PR is positive with respect to pin PT. VBAT2 is applied to the tip/ring drive amplifiers. On-hook transmission capability. All supervision active--an off-hook condition or a ring trip causes output NSTAT to go low. 1 Powerup, Forward Battery VBAT1. Pin PT is positive with respect to pin PR. VBAT1 is applied to the tip/ring drive amplifiers. On-hook transmission capability. All supervision active--an off-hook condition or a ring trip causes output NSTAT to go low. 1 Powerup, Reverse Battery VBAT1. Pin PR is positive with respect to pin PT. VBAT1 is applied to the tip/ring drive amplifiers. On-hook transmission capability. All supervision active--an off-hook condition or a ring trip causes output NSTAT to go low. 1 Ground Start. Tip drive amplifier is turned off. The device presents a high impedance (>100 k) to pin PT and a current-limited battery (VBAT1) to pin PR. Output pin RGDET indicates current flowing in the ring lead. 1 Low-Power Scan. Except for off-hook supervision, all circuits are shut down to conserve power. Only the off-hook detector affects output pin NSTAT. VBAT1 is applied to the tip/ring drive amplifiers. Pin PT is positive with respect to pin PR. On-hook transmission is disabled. 1 Low-Power Scan (L8560D/E/F/G Only). Except for off-hook supervision, all circuits are shut down to conserve power. Only the off-hook detector affects output pin NSTAT. VBAT2 is applied to the tip/ring drive amplifiers. Pin PT is positive with respect to pin PR. On-hook transmission is disabled. 1 Forward Disconnect. The tip and ring amplifiers are turned off and the SLIC goes into a high-impedance state (>100 k). VBAT2 is applied to the SLIC. 0 Ring State. SLIC is powered up. VBAT1 is applied to the tip and ring amplifiers. Current limit is increased by a factor of 2.8. Overhead voltage is reduced to approximately 2.4 V. These conditions are necessary to supply sufficient power to drive a true North American 5 REN ringing load (1386 + 40 F). Loop closure detector is disabled--only the ring trip detector affects output pin NSTAT. To apply a balanced ring signal to pins PR and PT, apply a 0 V to 5 V square wave to input pin B1. Ringing frequency is the frequency of the input wave at B1. To shape the ring signal at pins PR and PT, connect a capacitor from pin FB1 to ground and from pin FB2 to ground. 1 0 0 1 1 1 1 0 1 0 1 1 0 0 1 0 1 0 0 1 0 1/0 0 1 Table 4. Supervision Coding Pin NSTAT 0 = off-hook or ring trip 1 = on-hook and no ring trip Pin RGDET 1 = ring ground 0 = no ring ground Lucent Technologies Inc. 9 L8560 Low-Power SLIC with Ringing Data Sheet April 2000 Absolute Maximum Ratings (TA = 25 C) Stresses in excess of the absolute maximum ratings can cause permanent damage to the device. These are absolute stress ratings only. Functional operation of the device is not implied at these or any other conditions in excess of those given in the operational sections of the data sheet. Exposure to absolute maximum ratings for extended periods can adversely affect device reliability. Parameter 5 V Power Supply -5 V Power Supply (L8560C) Battery (talking) Supplies VBAT2 Magnitude Logic Input Voltage Analog Input Voltage Maximum Junction Temperature Storage Temperature Range Relative Humidity Range Ground Potential Difference (BGND to AGND) PT or PR Fault Voltage (dc) PT or PR Fault Voltage (10 x 1000 s) Current into Ring Trip Inputs Symbol VCC VEE VBAT1, VBAT2 IVBAT2I -- -- TJ Tstg RH -- VPT, VPR VPT, VPR IRTSP, IRTSN Value 7.0 -7.0 -75 IVBAT1I + 0.4 -0.5 to +7.0 -7.0 to +7.0 165 -40 to +125 5 to 95 3 (VBAT1 - 5) to +3 (VBAT1 - 15) to +15 240 Unit V V V V V V C C % V V V A Note: The IC can be damaged unless all ground connections are applied before, and removed after, all other connections. Furthermore, when powering the device, the user must guarantee that no external potential creates a voltage on any pin of the device that exceeds the device ratings. Some of the known examples of conditions that cause such potentials during powerup are 1) an inductor connected to tip and ring can force an overvoltage on VBAT through the protection devices if the VBAT connection chatters, and 2) inductance in the VBAT lead could resonate with the VBAT filter capacitor to cause a destructive overvoltage. 10 Lucent Technologies Inc. Data Sheet April 2000 L8560 Low-Power SLIC with Ringing Recommended Operating Conditions Parameter Ambient Temperature Loop Closure Threshold-detection Programming Range dc Loop Current-limit Programming Range On- and Off-hook 2-wire Signal Level (@ ZLOOP = 200 ) ac Termination Impedance Programming Range VBAT1 VBAT2 VCC VEE (L8560C) dc Feed Resistance Programming Range (excl. RP) Min -40 5 5 -- 150 -24 -16 4.5 -4.75 55 Typ -- 10 40 -- 600 -48 -- 5.0 -5.0 55 Max 85 ILIM 50 2.2 1300 -70 VBAT1 5.5 -5.5 760 Unit C mA mA Vrms V V V V Electrical Characteristics Minimum and maximum values are testing requirements in the temperature range of 25 C to 85 C and battery range of -24 V to -70 V. These minimum and maximum values are guaranteed to -40 C based on component simulations and design verification of samples, but devices are not tested to -40 C in production. The test circuit shown in Figure 5 is used, unless otherwise noted. Positive currents flow into the device. Typical values are characteristics of the device design at 25 C based on engineering evaluations and are not part of the test requirements. Supply values used for typical characterization are VCC = 5.0 V, VEE = -5.0 V, VBAT1 = -48 V, VBAT2 = -25.5 V, unless otherwise noted. Lucent Technologies Inc. 11 L8560 Low-Power SLIC with Ringing Data Sheet April 2000 Electrical Characteristics (continued) Table 5. Power Supply VCC = 5.0 V, VEE = -5.0 V, VBAT1 = -48 V, VBAT2 = -19 V, unless otherwise noted. Parameter Power Supply Rejection 500 Hz to 3 kHz (See Figures 6, 7, 14, and 15.)1: VCC (1 kHz), VEE (1 kHz)2 VBAT1, VBAT2 (500 Hz--3 kHz) Thermal Protection Shutdown (Tjc) Thermal Resistance, Junction to Ambient (JA), Still Air, 44-pin PLCC Thermal Resistance, Junction to Ambient (JA), Still Air, 32-pin PLCC Power Supply--Powerup, No Loop Current, VBAT2 Applied L8560A/D/E/F/G: ICC IBAT1 IBAT2 Power Supply--Powerup, No Loop Current, VBAT1 Applied: ICC (L8560A/D/E/F/G) IBAT1 (L8560A) IBAT1 (L8560D/E/F/G) IBAT2 (L8560D/E/F/G) Power Supply--Scan Mode, Forward Battery, No Loop Current, VBAT1 Applied: ICC (L8560A/D/E/F/G) IBAT1 (L8560A) IBAT1 (L8560D/E/F/G) IBAT2 (L8560D/E/F/G) Power Supply--Scan Mode, Forward Battery, No Loop Current, VBAT2 Applied: ICC IBAT1 (VBAT1 = -65 V) IBAT2 (VBAT2 = -30 V) Power Supply--Powerup, No Loop Current, L8560C Only: ICC IEE IBAT1 (VBAT1 applied) IBAT2 (VBAT2 applied) IBAT1 (VBAT2 applied) Power Supply--Scan, Forward Battery, No Loop Current, VBAT1 Applied, L8560C Only: ICC IEE IBAT (VBAT1 applied) Power Supply--Ring Mode, No Loop Current: ICC IBAT1 Min Typ Max Unit 35 45 -- -- -- -- -- 165 47 60 -- -- -- -- -- dB dB C C/W C/W -- -- -- -- -- -- -- 6.0 120 2.6 6.0 2.8 1.65 1.0 7.2 200 3.2 7.2 3.3 2.0 1.3 mA A mA mA mA mA mA -- -- -- -- 4.0 1.3 0.5 0.9 5.2 1.6 0.75 1.2 mA mA mA mA -- -- -- -- -- -- -- -- 4.1 200 1.2 5.8 0.9 1.65 1.50 120 -- -- -- 7.2 1.26 2.2 1.96 200 mA A mA mA mA mA mA A -- -- -- -- -- 4.1 0.81 0.43 6.45 2.2 5.5 1.1 0.56 -- -- mA mA mA mA mA 1. This parameter is not tested in production. It is guaranteed by design and device characterization. 2. VEE used for L8560C version only. 12 Lucent Technologies Inc. Data Sheet April 2000 L8560 Low-Power SLIC with Ringing (continued) Electrical Characteristics Table 6. 2-Wire Port Parameter Tip or Ring Drive Current = dc + Longitudinal + Signal Currents Signal Current Longitudinal Current Capability per 2 Min 65 15 8.5 5 -- Typ -- -- 15 -- -- Max -- -- -- 50 5 Unit mA mArms mArms mA % Wire1 dc Loop Current Limit : Programmability Range3 Accuracy (B0 = BR = 5 V, RLOOP = 100 , VBAT1 = -48 V or VBAT2 = -25.5 V active) Powerup Open Loop Voltage Levels: Differential Voltage - VBAT2 (VBAT2 = -25.5 V) Differential Voltage - VBAT1 (VBAT1 = -48 V)4 Differential Voltage - VBAT1 (ring mode) Ground Start State: PT Resistance dc Feed Resistance (for ILOOP below current limit) Loop Resistance Range (3.17 dBm overload into 600 ; not including protection): ILOOP = 20 mA at VBAT1 = -48 V ILOOP = 20 mA at VBAT2 = -24 V Longitudinal to Metallic Balance--IEEE 5 Std. 455 (See Figure 8.)6, 7: L8560A/C: 200 Hz to 2999 Hz Forward/Reverse Battery 3000 Hz to 3400 Hz Forward/Reverse Battery L8560D/E: 200 Hz to 2999 Hz Forward Battery 3000 Hz to 3400 Hz Forward Battery 200 Hz to 2999 Hz Reverse Battery 3000 Hz to 3400 Hz Reverse Battery L8560F/G: 200 Hz to 2999 Hz Forward/Reverse Battery 3000 Hz to 3400 Hz Forward/Reverse Battery Metallic to Longitudinal Balance: 200 Hz to 4 kHz RFI Rejection (See Figure 9.)3: 0.5 Vrms, 50 Source, 30% AM Mod. 1 kHz 500 kHz to 100 MHz |VBAT2 + 6.9| |VBAT2 + 6.5| |VBAT2 + 6.1| |VBAT1 + 7.1| |VBAT1 + 6.7| |VBAT1 + 6.3| |VBAT1 + 5.5| |VBAT1 + 2.4| -- 100 -- -- 55 -- 80 V V V k 1940 760 -- -- -- -- 54 49 63 58 58 54 50 45 46 -- 59 54 68 63 63 59 55 50 -- -55 -- -- -- -- -- -- -- -- -- -45 dB dB dB dB dB dB dB dB dB dBV 1. The longitudinal current is independent of dc loop current. 2. Current-limit ILIM is programmed by a resistor, RPROG, from pin IPROG to DCOUT. ILIM is specified at the loop resistance where current limiting begins (see Figure 22). Select RPROG (k) = 0.616 x ILIM (mA) - onset of current limit with input BR high. When input BR is low, the current will be increased by a factor of 2.8. 3. This parameter is not tested in production. It is guaranteed by design and device characterization. 4. Specification is reduced to |VBAT1 + 10.5 V| minimum when VBAT1 = -70 V at 85 C. 5. IEEE is a registered trademark of The Institute of Electrical and Electronics Engineers, Inc. 6. Longitudinal balance of circuit card will depend on loop series protection resistor matching and magnitude. 7. Tested at 1000 Hz only. Full frequency specifications guaranteed by design and device characterization. Lucent Technologies Inc. 13 L8560 Low-Power SLIC with Ringing Data Sheet April 2000 Electrical Characteristics (continued) Table 7. Analog Pin Characteristics Parameter Differential PT/PR Current Sense (DCOUT): Gain (PT/PR to DCOUT) Offset Voltage @ ILOOP = 0 Loop Closure Detector Threshold1: Programming Accuracy at 10 mA Ring Ground Detector Threshold2: RICM = 83 k Programming Accuracy Ring Trip Comparator: Input Offset Voltage3 Internal Voltage Source (L8560A/D/E/F) Internal Voltage Source (L8560C) Current at Input RTSP4 RCVN, RCVP: Input Bias Current Loop Closure Detector Hysteresis Variation THD3 at VPT/PR = 2.2 Vrms, VOH = 12 V, ZT = 200 VITR Output Impedance VITR Output Offset Voltage Average/dc Current to FB1 and FB2 Tested as: (|FB1 (FB) (-5 V)| + |FB1 (FB) (-63 V)| + 2|FB1 (FB) (-35 V)| + |FB2 (FB) (-5 V)| + |FB2 (FB) (-63 V)| + 2|FB2 (FB) (-35 V)| + |FB1 (RB) (-5 V)| + |FB1 (RB) (-63 V)| + 2|FB1 (RB) (-35 V)| + |FB2 (RB) (-5 V)| + |FB2 (RB) (-63 V)| + 2|FB2 (RB) (-35 V)|)/16 Accuracy Min -- -200 -- 3 -- -- -8.6 -6.1 IN - 0.5 -- -- -- -- -- -- -- Typ -41.7 -- -- 6 -- 10 -8.2 -5.7 IN -0.2 2 15 -- 5 20 29 Max -- 200 20 10 25 -- -7.6 -5.1 IN + 0.5 -1 -- -- -35 -- -- -- Unit V/A mV % k % mV V V A A mA % dB mV A -- -- 8 % 1. Loop closure threshold is programmed by resistor RLCTH from pin LCTH to pin DCOUT. 2. Ring ground threshold is programmed by resistor RICM2 from pin ICM to VCC. 3. This parameter is not tested in production. It is guaranteed by design and device characterization. 4. IN is the sourcing current at RTSN. Guaranteed if IN is within 5 A to 30 A. Table 8. Uncommitted Op Amp Characteristics (44-Pin PLCC Only) Parameter Input Offset Voltage Input Offset Current Input Bias Current Differential Input Resistance Output Voltage Swing (RL = 10 k) Output Resistance (AVCL = 1) Small-signal GBW Min -- -- -- -- -- -- -- Typ 5 10 200 1.5 3.5 2.0 700 Max -- -- -- -- -- -- -- Unit mV nA nA M Vpk kHz 14 Lucent Technologies Inc. Data Sheet April 2000 L8560 Low-Power SLIC with Ringing (continued) Electrical Characteristics Table 9. ac Feed Characteristics Parameter ac Termination Impedance1 Longitudinal Impedance Min 150 -- -- -- -392 7.76 -7.76 -- -- Typ -- 0 -- -- -400 8.00 -8.00 1 0.5 Max 1300 -- 0.3 1.0 -408 8.24 -8.24 -- -- Unit % % V/A -- -- s s Total Harmonic Distortion--200 Hz to 4 kHz2: Off-hook On-hook Transmit Gain, f = 1 kHz (PT/PR to VITR; see Figure 11.) Receive + Gain, f = 1 kHz (RCVP to PT/PR) Receive - Gain, f = 1 kHz (RCVN to PT/PR) Group Delay2: Transmit, Powerup Receive Gain vs. Frequency (transmit and receive) (600 termination; reference 1 kHz, 1 Vrms)2: 200 Hz to 300 Hz 300 Hz to 3.4 kHz 3.4 kHz to 16 kHz 16 kHz to 266 kHz Gain vs. Level (transmit and receive)(reference 0 dBV)2: -55 dB to +3 dB Return Loss2, 3: 200 Hz to 500 Hz 500 Hz to 3400 Hz 2-wire Idle-channel Noise (600 termination): Psophometric2 C-message 3 kHz Flat2 4-wire Idle-channel Noise: Psophometric2 C-message 3 kHz Flat2 Transhybrid Loss3: 200 Hz to 500 Hz 500 Hz to 3400 Hz -1.00 -0.3 -3.0 -- -0.05 -- -- -- -- -- -- -- -- -- -- 0.0 0.0 -0.1 -- 0 30 36 -87 2 10 -82 7 15 30 36 0.05 0.05 0.3 2.5 0.05 -- -- -77 12 20 -77 12 20 -- -- dB dB dB dB dB dB dB dBmp dBrnC dBrn dBmp dBrnC dBrn dB dB 1. Set by external components. Any complex impedance R1 + R2 || C between 150 and 1300 can be synthesized. 2. This parameter is not tested in production. It is guaranteed by design and device characterization. 3. Return loss and transhybrid loss are functions of device gain accuracies and the external hybrid circuit. Guaranteed performance assumes 1% tolerance external components. Not tested in production. Lucent Technologies Inc. 15 L8560 Low-Power SLIC with Ringing Data Sheet April 2000 Electrical Characteristics (continued) Table 10. Logic Inputs and Outputs Parameter Input Voltages: Low Level (permissible range) High Level (permissible range) Input Currents: Low Level (VCC = 5.25 V, VI = 0.4 V) High Level (VCC = 5.25 V, VI = 2.4 V) Output Voltages (open collector with internal pull-up resistor): Low Level (VCC = 4.75 V, IOL = 360 A) High Level (VCC = 4.75 V, IOH = -20 A) Symbol VIL VIH IIL IIH VOL VOH Min -0.5 2.0 -75 -40 0 2.4 Typ 0.4 2.4 -115 -60 0.2 -- Max 0.7 VCC -300 -100 0.4 VCC Unit V V A A V V Ring Trip Requirements s Ringing signal: -- Voltage, minimum 35 Vrms, maximum 100 Vrms. -- Frequency, 17 Hz to 23 Hz. -- Crest factor, 1.4 to 2. Ringing trip: -- 100 ms (typical), 250 ms (VBAT = -33 V, loop length = 530 ). Pretrip: -- The circuits in Figure 4 will not cause ringing trip. 200 TIP SWITCH CLOSES < 12 ms 6 F PER TA 909 8 F PER TR 57 TIP 10 k RING RING s s 2 F TIP 100 RING 12-2572.e (F) Figure 4. Ring Trip Circuits 16 Lucent Technologies Inc. Data Sheet April 2000 L8560 Low-Power SLIC with Ringing Test Configurations VBAT2 0.1 F VBAT1 0.1 F VBAT2 VBAT1 TIP 100 PT SN 20 k XMT RLOOP RING 100 RCVN PR DCOUT 23.7 k IPROG 8.25 k LCTH 2 M RTSP 402 k 2 M 274 k RTSN ICM VBAT BS1 BS2 B0 B1 TG 4.32 k VTX 0.1 F TXI FB2 FB1 RGDET NSTAT BR B2 100 100 100 L8560 SLIC 66.5 k 13.7 k RCV 30.9 k FOR 32-PIN PLCC VITR RCVP 13.7 k 66.5 k 30.9 k RCV XMT BGND VCC 0.1 F FOR 44-PIN PLCC VCC AGND VITR 20 k 100 12-2570.f (F) Figure 5. Basic Test Circuit VBAT OR VCC 100 4.7 F VS VBAT OR VCC TIP DISCONNECT BYPASS CAPACITOR 100 4.7 F VS VBAT OR VCC 67.5 TIP 10 F + VM - VS VT/R 12-2582.b (F) VBAT OR VCC DISCONNECT BYPASS CAPACITOR + 900 VT/R BASIC TEST CIRCUIT 56.3 BASIC TEST CIRCUIT RING 67.5 10 F PSRR = 20log VS VM 12-2583.b (F) - RING PSRR = 20log Figure 6. Metallic PSRR Lucent Technologies Inc. Figure 7. Longitudinal PSRR 17 L8560 Low-Power SLIC with Ringing Data Sheet April 2000 Test Configurations (continued) ILONG 100 F TIP VS 368 368 TIP + VPT - - VPR + + VM BASIC TEST CIRCUIT RING ILONG BASIC TEST CIRCUIT - 100 F RING LONGITUDINAL BALANCE = 20 log VS VM ZLONG = VPR VPT OR ILONG ILONG 12-2585.a (F) 12-2584.c (F) Figure 8. Longitudinal Balance Figure 10. Longitudinal Impedance 0.01 F 600 50 VS 0.01 F 82.5 TIP 1 6, 7 L7590 4 2 VBAT BASIC TEST CIRCUIT RING 82.5 TIP XMT (44-PIN PLCC) VITR (32-PIN PLCC) BASIC TEST CIRCUIT + 600 VT/R 2.15 F - RING RCV VS HP * 4935A TIMS 5-6756.a (F) * HP is a registered trademark of Hewlett-Packard Company. Notes: VS = 0.5 Vrms 30% AM 1 kHz modulation. f = 500 kHz--1 MHz. Device in powerup mode 600 termination. VXMT GXMT = VT/R GRCV = VT/R VRCV 12-2587.d (F) Figure 11. ac Gains Figure 9. RFI Rejection 18 Lucent Technologies Inc. Data Sheet April 2000 L8560 Low-Power SLIC with Ringing Applications Characteristic Curves 0 0 RECEIVE GAIN PSRR (dB) -10 SPEC. RANGE -10 -20 -30 -40 CURRENT LIMIT -20 (dB) -30 HYBRID BALANCE -50 CURRENT LIMIT BELOW -60 -40 -50 100 -70 -80 10 1000 104 105 FREQUENCY (Hz) 12-2828.c (F) 100 1000 104 105 106 FREQUENCY (Hz) 12-2830.a (F) Figure 12. L8560 Receive Gain and Hybrid Balance vs. Frequency Figure 14. L8560 Typical VCC Power Supply Rejection 0 -10 0 TRANSMIT GAIN -10 PSRR (dB) -20 -30 -40 SPEC. RANGE CURRENT LIMIT -20 (dB) -30 RETURN LOSS -40 -50 100 -50 -60 -70 -80 10 100 1000 104 105 106 FREQUENCY (Hz) BELOW CURRENT LIMIT 1000 10 4 10 5 12-2871.a (F) FREQUENCY (Hz) 12-2829.b (F) Figure 15. L8560 Typical VBAT Power Supply Rejection Figure 13. L8560 Transmit Gain and Return Loss vs. Frequency Lucent Technologies Inc. 19 L8560 Low-Power SLIC with Ringing Data Sheet April 2000 Applications (continued) Characteristic Curves (continued) OFF-HOOK THRESHOLD LOOP CURRENT (mA) 25 50 LOOP CURRENT (mA) 20 40 ILIM TESTED 1 12.5 k ILIM ONSET 15 30 20 -1 Rdc1 10 10 0 0 10 5 20 30 LOOP VOLTAGE (V) 40 50 12-3050.k (F) 0 0 10 20 30 40 50 60 LOOP CLOSURE THRESHOLD RESISTOR, RLCTH (k) 12-3015 (F) Note: VBAT1 = -48 V; ILIM = 22 mA; Rdc1 = 55 . Note: VBAT1 = -48 V, ITR = 1.2 x 10-3 RLCTH (k). Figure 18. Loop Current vs. Loop Voltage Figure 16. Loop Closure Program Resistor Selection 50 THRESHOLD RING GROUND CURRENT (mA) 35 30 25 20 15 10 5 0 0 20 40 60 80 100 120 140 LOOP CURRENT (mA) 40 30 20 10 0 0 500 1000 1500 2000 LOOP RESISTANCE, RLOOP () 12-3051 (F) Note: VBAT1 = -48 V; ILIM = 22 mA; Rdc1 = 55 . RING GROUND CURRENT DETECTION RESISTOR, RICM (k) 12-3016.f (F) Figure 19. Loop Current vs. Loop Resistance Note: Tip lead is open; VBAT1 = -48 V. Figure 17. Ring Ground Detection Programming 20 Lucent Technologies Inc. Data Sheet April 2000 L8560 Low-Power SLIC with Ringing dc Applications Battery Feed The dc feed characteristic can be described by: Applications (continued) Characteristic Curves (continued) 1500 SLIC POWER DISSIPATION (mW) VT/R = ( VBAT - VOH ) x RL ------------------------------------------RL + 2RP + Rdc VBAT - VOH --------------------------------RL + 2RP + Rdc 1000 IL = 500 where: IL = dc loop current. VT/R = dc loop voltage. |VBAT| = battery voltage magnitude. Note: The L8560 has a battery switch circuit that allows use of a primary battery, VBAT1, or an auxiliary battery, VBAT2. |VBAT| is the battery, VBAT1 or VBAT2, that is active. See the Battery Switch section for more information. VOH = overhead voltage. This is the difference between the battery voltage and the open loop tip/ring voltage. RL = loop resistance, not including protection resistors. RP = protection resistor value. Rdc = SLIC internal dc feed resistance. The design begins by drawing the desired dc template. An example is shown in Figure 22. 0 0 500 1000 1500 2000 LOOP RESISTANCE, RLOOP () Note: VBAT1 = -48 V; ILIM = 22 mA; Rdc1 = 55 . 12-3052 (F) Figure 20. L8560 Typical SLIC Power Dissipation vs. Loop Resistance 2000 1750 1500 POWER (mW) 1250 1000 750 500 250 0 20 40 60 80 100 120 140 160 180 0 0 12-2825.e (F) 50 300 cu. ft./min. 44-PIN PLCC STILL AIR 44-PIN PLCC LOOP CURRENT (mA) 40 ILIM TESTED 1 12.5 k ILIM ONSET 30 STILL AIR 32-PIN PLCC 20 -1 Rdc1 10 AMBIENT TEMPERATURE, TA (C) 10 20 30 LOOP VOLTAGE (V) 40 50 12-3050.k (F) Figure 21. Power Derating Note: VBAT1 = -48 V; ILIM = 22 mA; Rdc1 = 55 . Figure 22. Loop Current vs. Loop Voltage Lucent Technologies Inc. 21 L8560 Low-Power SLIC with Ringing Data Sheet April 2000 Tip/ring voltage where current-limit onsets (VT/Ronset): ( VBAT - VOH ) x RLonset VT/Ronset = ------------------------------------------------------------------RLonset + 2RP + Rdc Applications (continued) dc Applications (continued) Starting from the on-hook condition and going through to a short circuit, the curve passes through two regions: Region 1: On-hook and low loop currents. In this region, the slope corresponds to the dc resistance of the SLIC, Rdc1 (default is 55 typical). The open circuit voltage is the battery voltage less the overhead voltage of the device, VOH (default is 6.7 V typical). These values are suitable for most applications but can be adjusted if needed. For more information, see the sections titled Adjusting dc Feed Resistance or Adjusting Overhead Voltage. Region 2: Current limit. The dc current is limited to a starting value determined by external resistor RPROG, an internal current source, and the gain from tip/ring to pin DCOUT. Current limit is set by the equation: IPROG x RPROG = ILIM x BDCOUT Where: IPROG = the current from an internal current source RPROG = the external resistor used to set the current limit BDCOUT = the transconductance from tip/ring to DCOUT, which is nominally 41.67 V/A During nonringing modes, the internal current source is set at 75 A, thus: IPROG x RPROG = ILIM x BDCOUT RPROG = ILIM x BDCOUT/IPROG RPROG (K) = ILIM (mA) x 0.04167 (V/mA)/75e-3 (mA) RPROG (K) = 0.556 x ILIM (mA) Testing data shows that: RPROG (K) = 0.616 x ILIM (mA) This equation is a first-order estimation of the loop current at current-limit range. For more precise loop current at current-limit range, the loop current is also determined by loop length, protection resistance, and battery voltage. It can be shown through calculations as follows: Current-limit onset (ILonset): RPROG ( K ) ILonset (mA) = --------------------------------0.616 Loop resistance where current-limit onsets (RLonset): ( VBAT - VOH ) ( V ) RLonset () = ------------------------------------------------- x 1000 - 2RP - Rdc ILonset ( mA ) Tip/ring voltage when loop resistance is Rloop (VT/Rloop): VT/Rloop (V) = Iloop (mA) x RLOOP ()/1000 Loop current is now given by: Iloop (mA) = ILonset (mA) + (VT/Ronset - VT/Rloop) (V)/12.5 (k) or ILonset ( mA ) + VT Ronset ( V ) 12.5 ( k ) Iloop (mA) = ----------------------------------------------------------------------------------------------------------1 + Rloop ( ) 12500 ( k ) Current limit is not sensitive to temperature variation. Overhead Voltage In order to drive an on-hook ac signal, the SLIC must set up the tip and ring voltage to a value less than the battery voltage. The amount that the open loop voltage is decreased relative to the battery is referred to as the overhead voltage and is expressed as: VOH = |VBAT| - (VPT - VPR) Without this buffer voltage, amplifier saturation will occur and the signal will be clipped. The L8560 is automatically set at the factory to allow undistorted on-hook transmission of a 3.17 dBm signal into a 900 loop impedance. The drive amplifiers are capable of 4 Vrms minimum (VAMP). So, the maximum signal the device can guarantee is: ZT/R VT/R = 4 V -------------------------------- ZT/R + 2RP For applications where higher signal levels are needed, e.g., periodic pulse metering, the 2-wire port of the SLIC can be programmed with pin DCR (pin DCR is not available in the 32-pin PLCC package). The first step is to determine the amount of overhead voltage needed. The peak voltage at output of tip and ring amplifiers is related to the peak signal voltage by: VAMP = VT/R 1 + 2RP ----------- ZT/R 22 Lucent Technologies Inc. Data Sheet April 2000 L8560 Low-Power SLIC with Ringing the case of -5 V, the overhead voltage will be independent of the battery voltage. Figure 24 shows the equivalent input circuit to adjust the overhead. Applications (continued) dc Applications (continued) RP + VT/R - RP 12-2563.c (F) + [ZT/R] VAMP - R1 DCR R2 -5 V 12-2562.b (F) Figure 23. SLIC 2-Wire Output Stage In addition to the required peak signal level, the SLIC needs about 2 V from each power supply to bias the amplifier circuitry. It can be thought of as an internal saturation voltage. Combining the saturation voltage and the peak signal level, the required overhead can be expressed as: VOH 2RP = VSAT + 1 + ----------- VT/R ZT/R Figure 24. Equivalent Circuit for Adjusting the Overhead Voltage The overhead voltage is programmed by using the following equation: VOH = 7.1 - 18.18 VDCR R1 = 7.1 - 18.18 - 5 x --------------------- R2 + R1 Adjusting dc Feed Resistance The dc feed resistance may be adjusted with the help of Figure 25. 2RP = VSAT + 1 + ----------- 2 ZT/R- x 10dBm/20 -------------ZT/R 1000 where VSAT is the combined internal saturation voltage between the tip/ring amplifiers and VBAT (4.0 V typ.). RP () is the protection resistor value. ZT/R () is the ac loop impedance. Example 1, On-Hook Transmission of a Meter Pulse: Signal level: 2.2 Vrms into 200 35 protection resistors ILOOP = 0 (on-hook transmission of the metering signal) 2 x 35 VOH = 4.0 + 1 + ---------------- 2 (2.2) 200 = 8.2 V Accounting for VSAT tolerance of 0.5 V, a nominal overhead of 8.7 V would ensure transmission of an undistorted 2.2 V metering signal. Adjusting Overhead Voltage To adjust the open loop 2-wire voltage, pin DCR (44-pin PLCC only) is programmed at the midpoint of a resistive divider from ground to either -5 V or VBAT. In 44-PIN PLCC R1 DCR R3 DCOUT 12-2560.c (F) Figure 25. Equivalent Circuit for Adjusting the dc Feed Resistance Rdc = 55 + 705 ------------------------VDCR VDCOUT R1 = 55 + 705 --------------------- R3 + R1 Lucent Technologies Inc. 23 L8560 Low-Power SLIC with Ringing Data Sheet April 2000 Off-Hook Detection The loop closure comparator has built-in longitudinal rejection, eliminating the need for an external 60 Hz filter. This applies in both powerup and low-power scan states. The loop closure detection threshold is set by resistor RLCTH. Referring to Figure 27, NLC is high in an on-hook condition (ITR = 0, VDCOUT = 0) and VLCTH = 0.05 mA x RLCTH. The off-hook comparator goes low when VLCTH crosses zero and then goes negative: VLCTH = 0.05 mA x RLCTH + VDCOUT = 0.05 x RLCTH - 0.04167 V/mA x ITR RLTCH (k) = 0.833 ITR (mA) Testing data shows that: RLTCH (k) = 0.899 ITR (mA) Applications (continued) dc Applications (continued) Adjusting Overhead Voltage and dc Feed Resistance Simultaneously The above paragraphs describe the independent setting of the overhead voltage and the dc feed resistance. If both need to be set to customized values, combine the two circuits as shown in Figure 26. R1 DCR R2 -5 V DCOUT R3 RP ITR RL 12-2561.d (F) TIP + - RLCTH RING -0.04167 V/mA DCOUT RP LCTH 0.05 mA + - NLC Figure 26. Adjusting Both Overhead Voltage and dc Feed Resistance This is an equivalent circuit for adjusting both the dc feed resistance and overhead voltage together. The adjustments can be made by simple superposition of the overhead and dc feed equations: R1 || R3 VOH = 7.1 + 40 ---------------------------------- R2 + R1 || R3 R1 Rdc = 55 k + 705 --------------------- R2 + R1 Lower-value resistors can be used; the only disadvantage is the power consumption of the external resistors. Loop Range The equation below can be rearranged to provide the loop range for a required loop current: RL = VBAT - VOH --------------------------- - 2RP - Rdc IL 12-2553.d (F) Figure 27. Off-Hook Detection Circuit Note that NLC is internally wired-OR with the output of the ring trip detector (NRDET). The wired-OR, NSTAT, is a package output pin. Note that if NSTAT is used to directly control logic input B2, connect a 0.01 F capacitor from node LCTH to ground for filtering purposes. In this mode of operation, the L8560 will automatically switch to the lower-voltage battery under off-hook conditions. Also note that NSTAT will toggle low with a ring ground in the ground start application. Under a ring ground, one-half of the current appears as differential. This total ring ground current is approximately two times the current limit; thus, the differential current is approximately equal to the current limit, which typically exceeds the loop closure threshold. Thus, in the ground start application, if RGDET trips, NSTAT will also trip. Under this condition, via software, ignore the NSTAT transition. 24 Lucent Technologies Inc. Data Sheet April 2000 L8560 Low-Power SLIC with Ringing Power Derating Thermal considerations can affect the choice of a 32-pin PLCC or a 44-pin PLCC package. Operating temperature range, maximum current limit, maximum battery voltage, minimum dc loop, and protection resistor values will influence the overall thermal performance. This section shows the relevant design equations and considerations in evaluating the SLIC thermal performance. First, consider the L8560 SLIC in a 44-pin PLCC package. The still-air thermal resistance is 47 C/W; however, this number implies zero airflow as if the L8560 were totally enclosed in a box. A more realistic number would be 43 C/W. This is an experimental number that represents a thermal impedance with no forced airflow (i.e., from a muffin fan) but from the natural airflow as seen in a typical switch cabinet. The SLIC will enter the thermal shutdown state at typically 165 C. The thermal shutdown design should ensure that the SLIC temperature does not reach 165 C under normal operating conditions. Assume a maximum ambient operating temperature of 85 C, a maximum current limit of 45 mA, and a maximum battery of -52 V. Further, assume a (worst case) minimum dc loop of 100 and that 100 protection resistors are used at both tip and ring. 1. TTSD - TAMBIENT(max) = allowed thermal rise. 165 C - 85 C = 80 C 2. Allowed thermal rise = package thermal impedance * SLIC power dissipation. 80 C = 43 C/W * SLIC power dissipation SLIC power dissipation (PD) = 1.9 W Thus, if the total power dissipated in the SLIC is less than 1.9 W, it will not enter the thermal shutdown state. Total SLIC power is calculated as: Total PD = maximum battery * maximum current limit + SLIC quiescent power. For the L8560, SLIC quiescent power (PQ) is approximated at 0.167 W. Thus, Total PD = (-52 V * 45 mA) + 0.167 W Total PD = 2.34 W + 0.167 W Total PD = 2.507 W Applications (continued) dc Applications (continued) Ring Ground Detection Pin ICM sinks a current proportional to the longitudinal loop current. It is also connected to an internal comparator whose output is pin RGDET. In a ground start application where tip is open, the ring ground current is half differential and half common mode. In this case, to set the ring ground current threshold, connect a resistor RICM from pin ICM to VCC. Select the resistor according to the following relation: RICM (k) = VCC x 120 --------------------IRG ( mA ) The above equation is shown graphically in Figure 17. It applies for the case of tip open. The more general equation can be used in ground key applications to detect a common-mode current ICM: RICM (k) = VCC x 60 ---------------------ICM ( mA ) Longitudinal Balance The SLICs are graded with different codes to represent different longitudinal balance specifications. The numbers are guaranteed by testing (Figures 5 and 8). However, for specific applications, the longitudinal balance may also be determined by termination impedance, protection resistance, and especially by the mismatch between protection resistors at tip and ring. This can be illustrated by: ( 368 + RP ) x ( 368 + ZT - RP ) LB = 20 x log -----------------------------------------------------------------------------------------368 x ( 2 x [ ZT - 2 x RP ] x + ) where: LB: longitudinal balance RP: protection resistor value in ZT: magnitude of the termination impedance in : protection resistor mismatch in : SLIC internal tip/ring sensing mismatch The can be calculated using the above equation with these exceptions: = 0, ZT = 600 , RP = 100 , and the longitudinal balance specification on a specific code. Now with available, the equation will predict the actual longitudinal balance for RP, ZT, and . Be aware that ZT may vary with frequency for complex impedance applications. Lucent Technologies Inc. 25 L8560 Low-Power SLIC with Ringing Data Sheet April 2000 Ignore the "+" term: ILIM = 52 - 31.4 = 34 mA -----------------------600 Thus, 34 mA is the maximum allowable current limit in the 32-pin PLCC package under the conditions given in this example. This type of analysis should be performed under the conditions of the user's particular application to ensure adequate thermal design. Applications (continued) Power Derating (continued) The power dissipated in the SLIC is the total power dissipation less the power that is dissipated in the loop. SLIC PD = Total power - Loop power Loop power = (ILIM)2 * (RLOOP(dc) min + 2RP) Loop power = (45 mA)2 * (100 + 200 ) Loop power = 0.61 W SLIC power = 2.507 W - 0.61 W SLIC power = 1.897 W < 1.9 W Thus, in this example, the thermal design ensures that the SLIC will not enter the thermal shutdown state. The next example uses the 32-pin PLCC package and demonstrates the technique used to determine the maximum allowed current. In this example, assume a 0 C to 70 C operating range. Thus, TTSD - TAMBIENT (max) = allowed thermal rise 165 C - 70 C = 95 C To estimate the open-air thermal impedance, use the 43 C/W parameter from the 44-pin PLCC and ratio the lead count. 44 Thermal impedance (32-pin PLCC) = 48 C/W * -----32 = 59 C/W Again: Allowed thermal rise = thermal impedance * SLIC power dissipation 95 C = 59 C/W * SLIC power dissipation SLIC PD = 1.6 W In this example, again assume the dc loop + 2 * protection resistors = 300 , then: (ILIM)(VBAT max) + PQ - (ILIM)2 (Rdc + 2 RP) = 1.6 W I * 52 + 0.167 - I2 300 = 1.6 W 300 I2 - 52 I + 1.433 = 0 This is a quadratic equation whose solution is in the form: -b b - 4ac X = --------------------------------------2a ILIM = 52 52 - (4)(300)(1.433) ------------------------------------------------------------------------------2(300) 52 31.4 ILIM = ----------------------------600 2 2 Battery Switch The L8560 SLIC provides an input for an auxiliary battery. Called VBAT2, this power supply should be lower in magnitude than the primary battery VBAT1. Under an acceptable loop condition, VBAT2 can be switched to provide the loop power through the amplifiers of the SLIC. The dc template, described in previous sections, is determined by the battery that is active--either VBAT1 or VBAT2. There are several important applications where use of a lower-voltage battery in the off-hook state is desired to provide dc current to the loop, yet a higher-voltage battery is desired in on-hook or ringing modes. These applications are typically short-loop applications, such as an ISDN terminal adapter, fiber-in-the-loop applications, or a cable telephony interface. Typically, in these applications, the maximum dc loop resistance (which includes the off-hook telephone handset plus twisted-cable pair) is relatively low. For example, Bellcore TA-909, Generic Requirements and Objectives for Fiber in the Loop Systems, specifies that in the off-hook state, 20 mA must be provided into a 430 dc loop. To meet these requirements, a lower battery in the off-hook condition is important to minimize off-hook power consumption. Power conservation is important from a cost of energy point of view and is vital in remotely powered POTS interface applications. While use of a low-voltage battery in off-hook short dc loops is important, certain on-hook applications, such as providing a balanced power ring signal or maintaining compatibility with certain CPE such as answering machines, may require a higher magnitude battery. With the logic-controlled battery switch, the L8560 is able to provide a higher-voltage battery to meet onhook battery voltage requirements. At the same time, the L8560 can accept a lower-voltage auxiliary battery during short-loop, off-hook applications. If a dc/dc converter with two fixed voltage outputs is used, tie the battery voltage that is higher in magnitude to VBAT1 and the voltage that is lower in magnitude to VBAT2. If it is Lucent Technologies Inc. 26 Data Sheet April 2000 L8560 Low-Power SLIC with Ringing with respect to PR or vice versa. If a square wave signal is added to B1, the SLIC will be operating consecutively at battery forward, and then battery reversal. The differential output at PT and PR can be a balanced power ringing signal. Its frequency is equal to that of the square wave at B1. Its slew rate is determined by the size of the capacitors CFB1 and CFB2. If a sinusoidally modulated pulse-width-modulation (PWM) signal is applied to B1, the differential output at PT and PR will be sinusoidal. Theoretically, it provides power ringing in a sinusoidal format. For more information, please refer to the L8560 Sinusoidal Ringing Generation Using a PWM Input to B1 Application Note. POTS for ISDN Terminal Adapters The L8560 ringing SLIC is designed to provide a balanced power ring signal to tip and ring. This mode of operation is suited for short-loop, plain old telephone service (POTS) applications, such as ISDN terminal adapters (TA). When ISDN was first visualized, it was thought that we would all exchange our existing telephones for new, full-feature ISDN phones. Digital technology would drive these sets to very low costs. While this may happen in the future, the current demand is for the ISDN TA to service a standard analog telephone. The challenges of this application are discussed here along with a suggested solution. Until recently, POTS has been the exclusive domain of the service provider. Over its 100-year history, any architectural change was always required to be compatible with the existing installed local loop plant and all telephone sets. If this is the expectation of the TA, it would be capable of being connected into the residence phone wiring to drive every phone in the house. It would also be designed with enough backup battery to provide uninterrupted service during electrical power interruptions. In this case, adherence to a standard, such as Bellcore's TA-909, is recommended. For the case where a TA is only going to provide limited service, the design can be made less costly by limiting the scope of the device. An example of this limited scope would be the provision of analog jacks for a FAX/ modem and a phone set near the TA in a home office environment. A block diagram of a POTS design is outlined in Figure 28. Applications (continued) Battery Switch (continued) desired to use a single battery supply or a dc/dc converter with a single programmable voltage output, tie VBAT1 to VBAT2 and connect the battery to this node. Note that VBAT1 is forced during the balanced ringing state. VCC/VEE Supplies The L8560A/D/E/F SLICs are designed to operate using battery and only a 5 V power supply. In this mode of operation, power for the tip/ring drive amplifiers, dc feedback loop, internal amplifiers, logic, ac, and reference circuits is drawn from the negative battery (and 5 V supply). While the L8560A/D/E/F type devices offer very low power dissipation in both the sleep and active states, further reduction in power dissipation is possible by use of battery and +5 V and -5 V power supplies. The L8560C operates using battery, +5 V, and -5 V power supplies. When the -5 V is used, the internal amplifiers, logic, ac, and reference circuits draw power from the negative -5 V supply, not the negative battery. Since the magnitude of the -5 V supply is less than the battery, power consumption is reduced. With the L8560C, the tip/ring drive amplifiers and dc feedback loop still draw power from the battery. Power Ringing The L8560 ringing SLIC is designed with the capability of generating balanced power ring signal to tip and ring. Because the SLIC itself generates the power ringing signal, no ring relay is needed in this mode of operation. Alternatively, the L8560 SLIC can also be used in the more standard battery-backed, unbalanced ringing application. In this case, the ring signal is generated by a central ring generator and is bused to individual tip/ ring pairs. A ringing relay is used during ringing to disconnect the SLIC from, and apply the ring generator to, the tip and ring pair. This section discusses in detail the use of the L8560 ringing SLIC in either mode of application. Ringing SLIC Balanced Ring Signal Generation The internal dc current source drives current into or pulls current out from CFB1 and CFB2 depending on whether the SLIC is operating at battery forward or at battery reversal. The voltage at PT then will be positive Lucent Technologies Inc. 27 L8560 Low-Power SLIC with Ringing Data Sheet April 2000 Applications (continued) Power Ringing (continued) TO TELEPHONE SET XMT RJ-11 PROT. SLIC RINGER RCV DTMF DECODER P CODEC DX, DR CLK, FS TDM ISDN TA RJ-45 TO ISDN SERVICE 12-3286 Figure 28. POTS Controlled from an ISDN Terminal Adapter Power Ringing Load Bellcore TA-909 specifies that a minimum 40 Vrms must be delivered to a 5 REN ringing load of 1380 + 40 F. During the ringing state, VBAT1 is automatically applied to the tip/ring power amplifiers. For 5 REN load, it is recommended that VBAT1 be set to -65 Vdc. Also during the power ring state, the dc current limit is automatically boosted by a factor of 2.8 over the current limit set by resistor RPROG. Both of these factors are necessary to ensure delivery of 40 Vrms to the North American 5 REN ringing load of 1380 + 40 F. Crest Factor The balanced trapezoidal ring signal is generated by simply toggling the SLIC between the powerup state forward and powerup reverse battery states. The state change is done by applying a square wave (whose frequency is the desired ring frequency) to logic input B1. Capacitors FB1 and FB2 are used to control or ramp the speed of the transition of the battery reverse, thus shaping the balanced ring signal. Waveforms of crest factors 1.6 and 1.2 are shown in Figure 29 and Figure 30. In a real application, the ringing trapezoidal waveform crest factor can be estimated by: Crest factor = -----------------------------------------------------------------------------------------4 x f x CFB x ( VBAT - VOH ) 1 - --------------------------------------------------------------------------3 x ICS Where: f = ringing frequency; CFB = (CFB1 + CFB2)/2; ICS = 29 A @ 8% accuracy over temperature; VOH = SLIC overhead during ring. 1 80 60 VOLTS (V) 40 20 0 -20 -40 -60 -80 0.00 0.04 0.08 0.12 0.16 0.20 0.02 0.06 0.10 0.14 0.18 TIME (s) 12-3346a (F) Note: Slew rate = 5.65 V/ms; trise = tfall = 23 ms; pwidth = 2 ms; period = 50 ms. Figure 29. Ringing Waveform Crest Factor = 1.6 80 60 VOLTS (V) 40 20 0 -20 -40 -60 -80 0.00 0.04 0.08 0.12 0.16 0.20 0.02 0.06 0.10 0.14 0.18 TIME (s) 12-3347a (F) Note: Slew rate = 10.83 V/ms; trise = tfall = 12 ms; pwidth = 13 ms; period = 50 ms. Figure 30. Ringing Waveform Crest Factor = 1.2 28 Lucent Technologies Inc. Data Sheet April 2000 L8560 Low-Power SLIC with Ringing hook ringing current and off-hook current provide sufficient voltage differential at DCOUT to distinguish that a ring trip condition has occurred. The ring trip comparator threshold is set via a resistor between the ring trip comparator and ground. Output NSTAT is automatically set to detect ring trip during the balanced ring mode. During quiet intervals of ringing, output NSTAT is automatically determined by the loop closure detector. The equivalent ring trip circuit for the balanced ringing SLIC application is shown in Figure 31. The equations governing ring trip are derived below. Capacitors C2 and C4, in conjunction with resistors R2 and R4, form a double-pole, low-pass filter that smooths the voltage seen at DCOUT. The poles of the filters are determined by C2 and C4. Where these poles are set will influence both the ripple seen at DCOUT and the speed of the transition of the voltage at DCOUT from the pretrip to the tripped level. For the derivation of the ring trip threshold equations, capacitors C2 and C4 can be ignored. Redrawing the circuit, ignoring the capacitors, and taking the Thevenin equivalent circuit of the network at RTSN gives the results shown below in Figure 32. NLC RTSP R4 IN R1 R2 C2 RTSN 15 k IP = IN + - NRDET 8.2 V NSTAT Applications (continued) Power Ringing (continued) Current-Limit Switch During nonringing modes, the internal current source is set at 75 A. During the ring mode, the current limit is automatically increased by a factor of 2.8. This is done to provide sufficient ring to a true North American 5 REN load. This is done internally by increasing the value of IPROG from 75 A to 210 A, thus: IPROG * RPROG = lLIM * BDCOUT RPROG = lLIM * BDCOUT/IPROG RPROG(K) = lLIM (mA) * 0.04167 (V/mA)/210e-3 (mA) RPROG(K) = 0.198 * lLIM (mA) In the current-limit region, the dc template has a high resistance (12.5 k). Ring Trip Ring trip is accomplished by filtering the voltage seen at node DCOUT and applying it to the integrated ring trip comparator. DCOUT is a voltage proportional to the tip/ring current, and under short dc loop conditions, on- C4 DCOUT R3 12-3349.b (F) Figure 31. Equivalent Ring Trip Circuit for Balanced Ringing SLIC NLC R4 RTSP IP = IN IN R2 (R3/[R1 + R3]) DCOUT R1R3/(R1 + R3) RTSN 15 k + - NRDET 8.2 V NSTAT 12-3348.b (F) Figure 32. Thevenin Equivalent Ring Trip Circuit for Balanced Ringing SLIC Lucent Technologies Inc. 29 L8560 Low-Power SLIC with Ringing Data Sheet April 2000 Applications (continued) Power Ringing (continued) R3 ------------------ VDCOUT - ( -8.2 V ) R3 + R1 IRTSN = --------------------------------------------------------------------R1R3 ------------------ + R2 + 15 k R1 + R3 At the trip point, the internal current repeater will force IRTSP to be equal to IRTSN and VRTSP will be equal to VRTSN, which is -8.2 V. Thus, at the trip point: 0 - ( -8.2 ) IRTSN = IRTSP = -----------------------R4 Thus: R3 -------------------- VDCOUT + 8.2 V R3 + R1 8.2 V ---------------------------------------------------------------------- = ------------R1R3 R4 -------------------- + R2 + 15 k R1 + R3 Solving for VDCOUT, the voltage at DCOUT at the ring trip point is given by: R2 R1 15 k 1VDCOUT = 8.2 ( R3 + R1 ) ----------------------------------- + -------------- + --------------- - -----R1R4 + R3R4 R3R4 R3R4 R3 (TRIP) The loop current at ring trip is given by: ILOOP(TRIP) = (VDCOUT)/(DCOUT) For the L8560, the gain () at pin DCOUT is 41.67 V/A. Capacitors C2 and C4, along with resistors R2 and R4, respectively, form low-pass filters to filter the ac voltage seen at DCOUT before it is applied to the ring trip comparator input. The lower the pole of the filter, the less the ripple, but also the slower the state transition at NSTAT. Poles in the neighborhood of 2.5 Hz--3 Hz are suggested, as given by: 1 fLP = ----------------------2R2C2 1 fLP = ----------------------2R4C4 In the reference designs discussed in the next section, the ring trip threshold is set for 50 mA with: R1 = 210 k R2 = 124 k C2 = 0.1 F R3 = 562 k R4 = 351 k C4 = 0.1 F Except for L8560CAU, the internal voltage for L8560CAU is -5.7 V. 133 k should be used for R1. 30 Lucent Technologies Inc. Data Sheet April 2000 L8560 Low-Power SLIC with Ringing Applications (continued) Power Ringing (continued) Reference Designs for ISDN TA Applications A POTS circuit for reference design is shown in Figure 33. In Figure 33, the L8560 SLIC and T8503 codec are used. The ac circuit is designed per Bellcore TA-909 with a 600 resistive termination and hybrid circuit, with the transmit gain set for -2 dB and the receive gain set for -4 dB. The T8503 codec is compatible with the T7237 U-interface transceiver and the T7256 SCNT1 interface. R1 (RTS2)* 210 k R3 (RTS3) 562 k C2 (RTSN) 0.1 F R2 (RTSN) 124 k LCTH DCOUT IPROG RPROG 14 k BR B2 B1 B0 L8560A, D, E, F, G PT 1 VBAT RING RPR 30 2 6, 7 L7591 4 FGND 16 RCVN RTG 4.32 k PR VCC BGND AGND VBAT1 VBAT2 BS1 CF1 BS2 FB1 FB2 TG VTX TX1 CF2 CB2 0.1 F SUPERVISION OUTPUT R4 (RTSP) 351 k RLCTH 8.25 k C4 (CRTSP) 0.1 F RTSN RTSP NTSTAT RGDET ICM RX 71.5 k CC1 RT6 60.4 k 0.1 F RT3 165 k RHB1 143 k RRCV 178 k GSX VFXIN DX DR VFROP FSX FSR MCLK VITR CC2 0.1 F PCM HIGHWAY CONTROL INPUTS RPT TIP 30 RCVP RGP 41.2 k RGN 30.1 k RGP2 1.21 k CGP 220 pF SYNC AND CLOCK DGND CVDD 0.1 F DGND AGND VDD 1/2 T8503 CODEC CTG 27 pF CBAT1 0.1 F CBAT2 0.1 F CST 0.1 F RST 100 CBS CCC 0.22 F 0.1 F CFB1 4.7 nF CFB2 4.7 nF CF1 0.47 F CF2 0.1 F 12-3345.R (F) * R1 = 133 k for L8560C. Required only for L8560A/C versions. Notes: TX = -2 dB. RX = -4 dB. Termination = 600 . Hybrid balance = 600 . Figure 33. POTS Interface with Balanced Ringing Using L8560 SLIC and T8503 Codec Lucent Technologies Inc. 31 L8560 Low-Power SLIC with Ringing Data Sheet April 2000 Applications (continued) Power Ringing (continued) Table 11. Parts List for Balanced Ringing Using T8503 Codec Name Value Integrated Circuits SLIC L8560 Protector L7591 Codec T8503 Fault Protection 30 fusible RPT 30 fusible RPR Power Supply 0.1 F, 20%, 100 V CBAT1 0.1 F, 20%, 100 V CBAT2 0.1 F, 20%, 10 V CCC 0.47 F, 20%, 100 V CF1 0.1 F, 20%, 100 V CF2 0.22 F, 20%, 100 V CBS 0.1 F, 20%, 10 V CST 100 , 1%, 1/8 W RST dc Profile/Ringing 4.7 nF, 20%, 100 V CFB1 CFB2 4.7 nF, 20%, 100 V Function Subscriber line interface circuit (SLIC). Secondary protection. First-generation codec. Overcurrent protection. Overcurrent protection. VBAT filter capacitor. VBAT filter capacitor. VCC filter capacitor. With CF2, improves idle-channel noise. With CF1, improves idle-channel noise. Slows battery switch transition. Loop stability. Loop stability. With CFB2, slows rate of forward/reverse battery transition. Sets crest factor of balanced power ring signal. With CFB1, slows rate of forward/reverse battery transition. Sets crest factor of balanced power ring signal. Sets dc loop current. Sets internal transmit path gain to 19.2. ac/dc separation capacitor. dc blocking capacitor. dc blocking capacitor. With RGP and RRCV, sets ac termination impedance. With RGP and RT3, sets receive gain. With RT3 and RRCV, sets ac termination impedance and receive gain. Loop stability. Loop stability. Loop stability. Compensates for input bias offset at RCVN/RCVP. With RX, sets transmit gain in codec. With RT6, sets transmit gain in codec. Sets hybrid balance. Sets loop closure (off-hook) threshold. With R2, R3, and R4, sets ring trip threshold. With R1, R3, and R4, sets ring trip threshold. With R2, sets pole of low-pass ring trip sense filter. With R1, R2, and R4, sets ring trip threshold. With R1, R2, and R3, sets ring trip threshold. With R4, sets pole of low-pass ring trip sense filter. 14 k, 1%, 1/8 W RPROG ac Characteristics 4.32 k, 1%, 1/8 W RTG 0.1 F, 20%, 10 V CB2 0.1 F, 20%, 10 V CC1 0.1 F, 20%, 10 V CC2 165 k, 1%, 1/8 W RT3 178 k, 1%, 1/8 W RRCV 41.2 k, 1%, 1/8 W RGP 220 pF, 20%, 10 V CGP 27 pF, 20%, 10 V CTG* 1.21 k, 1%, 1/8 W RGP2 30.1 k, 1%, 1/8 W RGN 60.4 k, 1%, 1/8 W RT6 71.5 k, 1%, 1/8 W RX 143 k, 1%, 1/8 W RHB1 Supervision 8.25 k, 1%, 1/8 W RLCTH 210 k, 1%, 1/8 W R1 (RTS2) 124 k, 1%, 1/8 W R2 (RTSN) 0.1 F, 20%, 50 V C2 (CRTSN) 562 k, 1%, 1/8 W R3 (RTS3) 351 k, 1%, 1/8 W R4 (RTSP) 0.1 F, 20%, 10 V C4 (CRTSP) * Required for L8560A/L8560C version only. Use 133 k for L8560C. 32 Lucent Technologies Inc. Data Sheet April 2000 L8560 Low-Power SLIC with Ringing input. When ringing is being injected, no dc current flows through RTS1, so the RTSP input is at a lower potential than RTSN. When enough dc loop current flows, the RTSP input voltage increases to trip the comparator. In Figure 34, a low-pass filter with a double pole at 2 Hz was implemented to prevent false ring trip. The following example illustrates how the detection circuit in Figure 34 will trip at a 12.5 mA dc loop current using a -48 V battery. -8.2 V - (-48) IN = ------------------------------------2.289 M = 17.4 A The current IN is repeated as IP in the positive comparator input. The voltage at comparator input RTSP is: VRTSP = VBAT + ILOOP(dc) x RTS1 + IP x RTSP Using this equation and the values in the example, the voltage at input RTSP is -13.2 V during ringing injection (ILOOP(dc) = 0). Input RTSP is therefore at a level of 5 V below RTSN. When enough dc loop current flows through RTS1 to raise its dc drop to 5 V, the comparator will trip. In this example: 5V ILOOP(dc) = ---------------402 RTSP + IP = IN IN - RTSN 15 k + - NRDET 8.2 V Applications (continued) Design Considerations Unbalanced Bused Ring Signal Application The L8560 SLIC can also be used in the standard battery-backed, unbalanced ringing application. In this case, the ring signal is generated by a central ring generator and is bused to individual tip/ring pairs. A ringing relay is used during ringing to disconnect the SLIC from, and apply the ring generator to, the tip and ring pair. Ring Trip Detection The ring trip circuit is a comparator that has a special input section optimized for this application. The equivalent circuit is shown in Figure 34, along with its use in an application using unbalanced, battery-backed ringing. PHONE HOOK SWITCH RLOOP RC PHONE RTSP 2 M RTS1 402 RTS2 CRTS2 0.27 F RTSN = 12.5 mA Except for L8560CAU, the internal voltage for L8560CAU is -5.7 V. Note that during ringing in this mode of operation, both the NLC and NRDET circuits are active. During the actual ringing, NRDET is connected and NLC is isolated from tip and ring by the ring relay; thus, NSTAT reflects the status at NRDET. During quiet intervals of ringing, NLC is connected and NRDET is isolated from tip and ring by the ring relay; thus, NSTAT reflects the status at NLC. Thus, during ring cadence, the logic input that drives the ring relay can be used as an indication as to whether NRDET or NLC appears at output NSTAT. A basic loop start reference circuit, using bused ringing with the L8560 SLIC and T7504 first-generation codec, is shown in Figure 35. This circuit is designed for a 600 resistive termination impedance and hybrid balance. Transmit and receive gains are both set at 0 dB. CRTS1 0.022 F 274 k 2 M VRING VBAT 12-3014.c (F) Figure 34. Ring Trip Equivalent Circuit and Equivalent Application The comparator input voltage compliance is VCC to VBAT, and the maximum current is 240 A in either direction. Its application is straightforward. A resistance (RTSN + RTS2) in series with the RTSN input establishes a current that is repeated in the RTSP input. A slightly lower resistance (RTSP) is placed in series with the RTSP Lucent Technologies Inc. 33 L8560 Low-Power SLIC with Ringing Data Sheet April 2000 Applications (continued) Design Considerations (continued) CST 0.1 F VBAT1 RST 100 VBAT2 CBAT2 0.1 F CBS 0.22 F RGX 4.32 k CTG 27 pF* CB2 0.1 F RX 75.0 k RT6 49.9 k CC1 0.1 F VFXIN RHB1 75.0 k - + +2.4 V VFRO CC2 RGP2 0.1 F 1.21 k CGP 220 pF DR FSE FSEP MCLK ASEL CONTROL INPUTS SUPERVISION OUTPUTS RGN 29.4 k 1/4 T7504 CODEC SYNC AND CLOCK CONTROL INPUTS DX PCM HIGHWAY GSX VCC CBAT1 0.1 F CCC 0.1 F RPROG 14 k IPROG VBAT1 DCOUT RLCTH 8.25 k CROWBAR PROTECTOR TIP RPT TIP 50 L7581 RELAY L8560 SLIC RING RTSP LCTH VBAT2 BS1 BS2 VCC TG VTX TXI VITR RT3 174 k RRCV 100 k RING RPR 50 CROWBAR PROTECTOR RCVP RGP 41.2 k 2.0 M RTSP RTS1 402 CRTS2 0.27 F RTS2 274 k VRING CRTS1 0.022 F RTSN 2.0 M RTSN CF2 CF1 0.47 F CF2 0.1 F CF1 AGND BGND RCVN B1 B0 NSTAT VBAT 12-3550 (F) * Required for L8560A/L8560C version only. Notes: TX = 0 dB. RX = 0 dB. Termination = 600 . Hybrid balance = 600 . Figure 35. Basic Loop Start Application Circuit Using T7504 Codec and Bused Ringing 34 Lucent Technologies Inc. Data Sheet April 2000 L8560 Low-Power SLIC with Ringing Applications (continued) Design Considerations (continued) Figure 36 shows the ground start application. VCC RGDET 100 k RGDET ICM CICM 0.47 F RICM2 71.5 k RGDET GROUND START APPLICATION CIRCUIT 12-3547.a.c (F) Figure 36. Ground Start Application Circuit Table 12. Parts List for Loop Start with Bused Ringing and Ground Start Applications Name Integrated Circuits SLIC Protector Ringing Relay Codec Fault Protection RPT RPR Power Supply CBAT1 CBAT2 CCC CF1 CF2 CBS CST RST CTG dc Profile RPROG Value -- Crowbar protector* L7581 T7504 50 PTC or fusible 50 PTC or fusible 0.1 F, 20%, 100 V 0.1 F, 20%, 100 V 0.1 F, 20%, 10 V 0.47 F, 20%, 100 V 0.1 F, 20%, 100 V 0.22 F, 20%, 100 V 0.1 F, 20%, 10 V 100 , 1%, 1/8 W 27 pF, 20%, 10 V 14 k, 1%, 1/8 W Function Subscriber line interface circuit (SLIC). Secondary protection. Switches ringing signals. First-generation codec. Protection resistor. Protection resistor. VBAT filter capacitor. VBAT filter capacitor. VCC filter. With CF2, improves idle-channel noise. With CF1, improves idle-channel noise. Slows battery switch transition. Loop stability. Loop stability. Loop stability. Sets dc loop current. * Contact your Lucent Technologies account representative for protector recommendations. Choice of this (and all) component(s) should be evaluated and confirmed by the customer prior to use in any field or laboratory system. Lucent does not recommend use of this part in the field without performance verification by the customer. This device is suggested by Lucent for customer evaluation. The decision to use a component should be based solely on customer evaluation. Required for L8560A/L8560C version only. Lucent Technologies Inc. 35 L8560 Low-Power SLIC with Ringing Data Sheet April 2000 Applications (continued) Design Considerations (continued) Table 12. Parts List for Loop Start with Bused Ringing and Ground Start Applications (continued) Name Value ac Characteristics RGX 4.32 k, 1%, 1/8 W CB2 0.1 F, 20%, 10 V RT3 174 k, 1%, 1/8 W RRCV 100 k, 1%, 1/8 W RGP 41.2 k, 1%, 1/8 W CGP 220 pF, 20%, 10 V RGP2 1.21 k, 1%, 1/8 W RGN 29.4 k, 1%, 1/8 W CC1 0.1 F, 20%, 10 V CC2 0.1 F, 20%, 10 V RT6 49.9 k, 1%, 1/8 W RX 75.0 k, 1%, 1/8 W RHB1 75.0 k, 1%, 1/8 W Supervision RLCTH 8.25 k, 1%, 1/8 W RTS1 402 , 5%, 2 W RTS2 274 k, 1%, 1/8 W CRTS1 0.022 F, 20%, 5 V CRTS2 0.27 F, 20%, 100 V RTSN 2 M, 1%, 1/8 W RTSP 2 M, 1%, 1/8 W Ground Start CICM 0.47 F, 20%, 10 V RGDET 100 k, 20%, 1/8 W RICM2 71.5 k, 1%, 1/8 W Function Sets internal transmit path gain of 9.6. ac/dc separation capacitor. With RGP and RRCV, sets ac termination impedance. With RGP and RT3, sets receive gain. With RT3 and RRCV, sets ac termination impedance and receive gain. Loop stability. Loop stability. Compensates for input bias offset at RCVN/RCVP. dc blocking capacitor. dc blocking capacitor. With RX, sets transmit gain in codec. With RT6, sets transmit gain in codec. Sets hybrid balance. Sets loop closure (off-hook) threshold. Ringing source series resistor. With CRTS2, forms first pole of a double pole, 2 Hz ring trip sense filter. With RTSN and RTSP, forms second 2 Hz filter pole. With RTS2, forms first 2 Hz filter pole. With CRTS1 and RTSP, forms second 2 Hz filter pole. With CRTS1 and RTSN, forms second 2 Hz filter pole. Provides 60 Hz filtering for ring ground detection. Digital output pull-up resistor. Sets ring ground detection threshold. 36 Lucent Technologies Inc. Data Sheet April 2000 L8560 Low-Power SLIC with Ringing Applications (continued) Design Considerations (continued) Table 13 shows the design parameters of the application circuit shown in Figure 35. Components that are adjusted to program these values are also shown. Table 13. 600 Design Parameters Design Parameter Loop Closure Threshold dc Loop Current Limit dc Feed Resistance 2-wire Signal Overload Level ac Termination Impedance Hybrid Balance Line Impedance Transmit Gain Receive Gain Parameter Value 10 mA 25 mA 55 3.14 dBm 600 600 0 dB 0 dB Components Adjusted RLCTH RPROG -- -- RT3, RGP, RRCV RHB1 RT6, RX RRCV, RGP, RT3 ac Design There are four key ac design parameters. Termination impedance is the impedance looking into the 2-wire port of the line card. It is set to match the impedance of the telephone loop in order to minimize echo return to the telephone set. Transmit gain is measured from the 2-wire port to the PCM highway, while receive gain is done from the PCM highway to the transmit port. Finally, the hybrid balance network cancels the unwanted amount of the receive signal that appears at the transmit port. At this point in the design, the codec needs to be selected. The discrete network between the SLIC and the codec can then be designed. Below is a brief codec feature and selection summary. First-Generation Codecs These perform the basic filtering, A/D (transmit), D/A (receive), and -law/A-law companding. They all have an op amp in front of the A/D converter for transmit gain setting and hybrid balance (cancellation at the summing node). Depending on the type, some have differential analog input stages, differential analog output stages, and -law/A-law selectability. This generation of codec has the lowest cost. It is most suitable for applications with fixed gains, termination impedance, and hybrid balance. Second-Generation Codecs This class of devices includes a microprocessor interface for software control of the gains and hybrid balance. The hybrid balance is included in the device. ac programmability adds application flexibility and saves several passive components. It also adds several I/O latches that are needed in the application. It does not have the transmit op amp, since the transmit gain and hybrid balance are set internally. Third-Generation Codecs This class of devices includes the gains, termination impedance, and hybrid balance--all under microprocessor control. Depending on the device, it may or may not include latches. In the codec selection, increasing software control and flexibility are traded for device cost. To help decide, it may be useful to consider the following: Will the application require only one value for each gain and impedance? Will the board be used in different countries with different requirements? Will several versions of the board be built? If so, will one version of the board be most of the production volume? Does the application need only real termination impedance? Does the hybrid balance need to be adjusted in the field? Lucent Technologies Inc. 37 L8560 Low-Power SLIC with Ringing Data Sheet April 2000 Applications (continued) ac Design (continued) ac equivalent circuits using a T7504 codec (VCC only) are shown in Figures 37 and 38. Use the following two equations for Figure 37 below: RSTP = 1 k x {[RGP (k) || RRCV (k)]/24 (k)} CSTP = 270 pF/{[RGP (k) || RRCV (k)]/24 (k)} RX VGSX -0.400 V/mA VITR RCVN RCVP RGP + AV = -1 - L8560 SLIC RT6 VFXIN VFXIP - + +2.4 V ZT/R RP TIP - AV = 1 + CURRENT SENSE - AV = 4 + RT3 RHB1 RRCV VS IT/R + ZT VT/R - RP RING VFR RSTP CSTP 1/2 T7504 CODEC 12-2554.p (F) Figure 37. ac Equivalent Circuit Not Including Spare Op Amp Use the following two equations for Figure 38 below: RSTN = 1 k x {[RGN (k) || RRCV (k)]/24 (k)} CSTN = 270 pF/{[RGN (k) || RRCV (k)]/24 (k)} ZT5 RX VGSX RT4 VITR - SN AGND RCVN RCVP + XMT RT5X RT6 VFXIN VFXIP RT3 RHB1 RRCV - + +2.4 V ZT/R RP IT/R + VT/R - RP TIP - AV = 1 + CURRENT SENSE + AV = -1 - - AV = 4 + VFRO VS ZT RGN RSTN CSTN RING L8560 SLIC 1/4 T7504 CODEC 12-3013.j (F) Figure 38. ac Equivalent Circuit Including Spare Op Amp 38 Lucent Technologies Inc. Data Sheet April 2000 L8560 Low-Power SLIC with Ringing Applications (continued) Design Examples In the preceding examples, use of a first-generation codec is shown. The equations for second- and thirdgeneration codecs are simply subsets of these. There are two examples below. The first shows the simplest circuit, which uses a minimum number of discrete components to synthesize a real termination impedance. The second example shows the use of the uncommitted op amp to synthesize a complex termination. The design has been automated in a DOS-based program, available on request. Example 1, Real Termination The following design equations refer to the circuit in Figure 37. Use these to synthesize real termination impedance. Termination impedance: VT/R zT = ------------ IT/R 3200 zT = 2RP + ---------------------------------RT3 RT3 1 + -------- + ----------RGP RRCV Receive gain: VT/R grcv = ----------VFR grcv = 8 -----------------------------------------------------------------zT 1 + RRCV + RRCV 1 + -------- - ----------- ----------- RT3 RGP ZT/R Hybrid balance: RX hbal = 20log -------------- - gtx x grcv RHB1 VGSX hbal = 20log -------------- VFR To optimize the hybrid balance, the sum of the currents at the VFX input of the codec op amp should be set to 0. The expression for ZHB becomes: RHB1 ( k ) = RX -----------------gtx x grcv Example 2, Complex Termination For complex termination, the spare op amp may be used (see Figure 38). ZT5 3200 zT = 2RP + ---------------------------------- ( --------- ) - RT4 RT3 1 + -------- + ----------- RT3RGN RRCV = 2RP + k(ZT5) 8 grcv = ---------------------------------------------------------------------------RRCV RRCV zT 1 + ------------- + ------------- 1 + --------- RT3 RGN ZT/R gtx = RX 400 ZT5 RT5X RT5X --------- x --------- x --------- 1 + ------------- + --------------------------------------------------- RT6 ZT/R RT4 ZT5 RT3 + RGN || RRCV The hybrid balance equation is the same as in Example 1. Example 3, Complex Termination Without Spare Op Amp The gain shaping necessary for a complex termination impedance may be done without using the spare op amp by shaping across the Ax amplifier at nodes TG and VTX. This is a recommended approach. Transmit gain: gtx = VGSX ---------VT/R gtx = -RX x --------------- 400 RT6 ZT/R Lucent Technologies Inc. 39 L8560 Low-Power SLIC with Ringing Data Sheet April 2000 RX/RT6: With other components set, the transmit gain (for complex and resistive terminations) RX and RT6 are varied to give specified transmit gain. RT3/RRCV/RGP: For both complex and resistive terminations, the ratio of these resistors set the receive gain. For resistive terminations, the ratio of these resistors set the return loss characteristic. For complex terminations, the ratio of these resistors set the low-frequency return loss characteristic. CN/RN1/RN2: For complex terminations, these components provide high-frequency compensation to the return loss characteristic. 5-6396(F) Applications (continued) Design Examples (continued) Complex Termination Impedance Design Example Using L8560 Without Spare Op Amp Complex termination is specified in the form: R2 R1 C To work with this application, convert termination to the form: R1 For resistive terminations, these components are not used and RCVN is connected to ground via a resistor. RHB: Sets hybrid balance for all terminations. Set ZTG--gain shaping: R2 C 5-6398(F) ZTG = RTGP || RTGS + CGS which is a scaled version of ZT/R (the specified termination resistance) in the R1 || R2 + C form. RTGP must be 4.32 k to set SLIC transconductance to 400 V/A RTGP = 4.32 k At dc, CTGS and C are open. RTGP = M x R1 where M is the scale factor. 4320 M = -------------R1 It can be shown: RTGS = M x R2 and CTGS = C ----M where: R1 = R1 + R2 R1 R2 = ------- (R1 + R2) R2 2 R2 C = --------------------- C R1 + R2 ac Interface Using First-Generation Codec RTGP/RTGS/CGS (ZTG): These components give gain shaping to get good gain flatness. These components are a scaled version of the specified complex termination impedance. Note for pure (600 ) resistive terminations, components RTGS and CGS are not used. Resistor RTGP is used and is still 4.32 k. 40 Lucent Technologies Inc. Data Sheet April 2000 L8560 Low-Power SLIC with Ringing Applications (continued) Design Examples (continued) RTGS CG Rx -IT/R 207.36 RTGP = 4.32 k 0.1 F 19.2 VTX TXI VITR RT6 - + CODEC OP AMP CN RN1 RCVN RCVP RN2 RRCV RGP RT3 RHB CODEC OUTPUT DRIVE AMP 5-6400.b (F) Figure 39. Interface Circuit Using First-Generation Codec (Blocking Capacitors Not Shown) TX (specified[dB]) is the specified transmit gain. 600 is the impedance at the PCM and REQ is the impedance at Tip and ring. 20 log 600 ---------- represents the power REQ Transmit Gain Transmit gain will be specified as a gain from T/R to PCM, TX (dB). Since PCM is referenced to 600 and assumed to be 0 dB, and in the case of T/R being referenced to some complex impedance other than 600 resistive, the effects of the impedance transformation must be taken into account. Again, specified complex termination impedance at T/R is of the form: R2 loss/gain due to the impedance transformation. Note in the case of a 600 pure resistive termination at T/R 20 log 600 ---------- = 20 log REQ 600 --------- = 0. 600 Thus, there is no power loss/gain due to impedance transformation and TX (dB) = TX (specified[dB]). Finally, convert TX (dB) to a ratio, gTX: R1 C 5-6396(F) TX (dB) = 20 log gTX The ratio of RX/RT6 is used to set the transmit gain: RX RT6 ---------- = gTX * ----------------- First, calculate the equivalent resistance of this network at the midband frequency of 1000 Hz. REQ = 2 2 2 2 2 fR2 2 C1 - 2 ( 2 f ) C1 R1R2 + R1 + R2 + -------------------------------------------------- ---------------------------------------------------------------------------2 R2 2 C1 2 1 + ( 2 f ) 2 R2 2 C1 2 1 + ( 2 f ) Using REQ, calculate the desired transmit gain, taking into account the impedance transformation: TX (dB) = TX (specified[dB]) + 20 log 600 ---------REQ 207.36 19.2 1 * ---- M with a quad Lucent codec such as T7504: RX < 200 k Lucent Technologies Inc. 41 L8560 Low-Power SLIC with Ringing Data Sheet April 2000 Next, solve for the high-frequency return loss compensation circuit, CN, RN1, and RN2: 2RP CNRN2 = ------------ CG RTGP 3200 3200 RTGS RN1 = RN2 ------------ ------------- - 1 2RP RTGP There is an input offset voltage associated with nodes RCVN and RCVP. To minimize the effect of mismatch of this voltage at T/R, the equivalent resistance to ac ground at RCVN should be approximately equal to that at RCVP. Refer to Figure 40 on page 43 (with dc blocking capacitors). To meet this requirement, RN2 = RGP || RT3. Hybrid Balance Set the hybrid cancellation via RHB. RX RHB = -----------------------------gRCV x gTX Applications (continued) Design Examples (continued) Receive Gain Ratios of RRCV, RT3, RGP will set both the low-frequency termination and receive gain for the complex case. In the complex case, additional high-frequency compensation, via CN, RN1, and RN2, is needed for the return loss characteristic. For resistive termination, CN, RN1, and RN2 are not used and RCVN is tied to ground via a resistor. Determine the receive gain, gRCV, taking into account the impedance transformation in a manner similar to transmit gain. REQ RX (dB) = RX (specified[dB]) + 20 log ---------600 RX (dB) = 20 log gRCV Then: 4 gRCV = ----------------------------------------------RRCV RRCV -------------- + -------------1+ RT3 RGP and low-frequency termination 3200 ZTER(low) = -------------------------------------------- + 2RP RT3- --------------RT3 1 + ----------- + RGP RRCV ZTER(low) is the specified termination impedance assuming low frequency (C or C is open). RP is the series protection resistor. These two equations are best solved using a computer spreadsheet. 42 Lucent Technologies Inc. Data Sheet April 2000 L8560 Low-Power SLIC with Ringing Applications (continued) Design Examples (continued) Blocking Capacitors RTGS CGS Rx -IT/R 207.36 RTGP = 4.32 k 0.1 F 19.2 VTX TXI VITR RT6 CB1 - + CODEC OP AMP CN RN1 RCVN RCVP RN2 RRCV RGP RT3 RHB CB2 2.5 V CODEC OUTPUT DRIVE AMP 5-6401b(F) Figure 40. ac Interface Using First-Generation Codec (Including Blocking Capacitors) for Complex Termination Impedance If a 5 V only codec such as the Lucent T7504 is used, dc blocking capacitors must be added as shown in Figure 40. This is because the codec is referenced to 2.5 V and the SLIC to ground--with the ac coupling, a dc bias at T/R is eliminated and power associated with this bias is not consumed. Typically, values of 0.1 F to 0.47 F capacitors are used for dc blocking. The addition of blocking capacitors will cause a shift in the return loss and hybrid balance frequency response toward higher frequencies, degrading the lower-frequency response. The lower the value of the blocking capacitor, the more pronounced the effect is, but the cost of the capacitor is lower. It may be necessary to scale resistor values higher to compensate for the low-frequency response. This effect is best evaluated via simulation. A PSPICE* model for the L8560 is available. Design equation calculations seldom yield standard component values. Conversion from the calculated value to standard value may have an effect on the ac parameters. This effect should be evaluated and optimized via simulation. * PSPICE is a registered trademark of MicroSim Corporation. Lucent Technologies Inc. 43 L8560 Low-Power SLIC with Ringing Data Sheet April 2000 Outline Diagrams 32-Pin PLCC Dimensions are in millimeters. Note: The dimensions in this outline diagram are intended for informational purposes only. For detailed schematics to assist your design efforts, please contact your Lucent Technologies Sales Representative. 12.446 0.127 11.430 0.076 PIN #1 IDENTIFIER ZONE 1 30 4 5 29 13.970 0.076 14.986 0.127 13 21 14 20 3.175/3.556 SEATING PLANE 0.10 1.27 TYP 0.38 MIN TYP 0.330/0.533 5-3813r2 (F) 44 Lucent Technologies Inc. Data Sheet April 2000 L8560 Low-Power SLIC with Ringing Outline Diagrams (continued) 44-Pin PLCC Dimensions are in millimeters. Note: The dimensions in this outline diagram are intended for informational purposes only. For detailed schematics to assist your design efforts, please contact your Lucent Technologies Sales Representative. 17.65 MAX 16.66 MAX PIN #1 IDENTIFIER ZONE 6 1 40 7 39 16.66 MAX 17.65 MAX 17 29 18 28 4.57 MAX SEATING PLANE 0.10 1.27 TYP 0.53 MAX 0.51 MIN TYP 5-2506r.8(F) Lucent Technologies Inc. 45 L8560 Low-Power SLIC with Ringing Data Sheet April 2000 Ordering Information Device Code LUCL8560AAU-D LUCL8560AAU-DT LUCL8560AP-D LUCL8560AP-DT LUCL8560CAU-D LUCL8560CAU-DT LUCL8560DAU-D LUCL8560DAU-DT LUCL8560EP-D LUCL8560EP-DT LUCL8560FAU-D LUCL8560FAU-DT LUCL8560GP-D LUCL8560GP-DT Description Low-power SLIC (Dry-bagged) Low-power SLIC (Tape and Reel, Dry-bagged) Low-power SLIC (Dry-bagged) Low-power SLIC (Tape and Reel, Dry-bagged) Low-power SLIC (Dry-bagged) Low-power SLIC (Tape and Reel, Dry-bagged) Low-power SLIC (Dry-bagged) Low-power SLIC (Tape and Reel, Dry-bagged) Low-power SLIC (Dry-bagged) Low-power SLIC (Tape and Reel, Dry-bagged) Low-power SLIC (Dry-bagged) Low-power SLIC (Tape and Reel, Dry-bagged) Low-power SLIC (Dry-bagged) Low-power SLIC (Tape and Reel, Dry-bagged) Package 32-Pin PLCC 32-Pin PLCC 44-Pin PLCC 44-Pin PLCC 32-Pin PLCC 32-Pin PLCC 32-Pin PLCC 32-Pin PLCC 44-Pin PLCC 44-Pin PLCC 32-Pin PLCC 32-Pin PLCC 44-Pin PLCC 44-Pin PLCC Comcode 107957375 107957383 107891111 107891129 107953390 107953408 108130576 108130584 108133000 108133018 108190885 108190893 108190935 108190943 For additional information, contact your Microelectronics Group Account Manager or the following: INTERNET: http://www.lucent.com/micro E-MAIL: docmaster@micro.lucent.com N. AMERICA: Microelectronics Group, Lucent Technologies Inc., 555 Union Boulevard, Room 30L-15P-BA, Allentown, PA 18103 1-800-372-2447, FAX 610-712-4106 (In CANADA: 1-800-553-2448, FAX 610-712-4106) ASIA PACIFIC: Microelectronics Group, Lucent Technologies Singapore Pte. Ltd., 77 Science Park Drive, #03-18 Cintech III, Singapore 118256 Tel. (65) 778 8833, FAX (65) 777 7495 CHINA: Microelectronics Group, Lucent Technologies (China) Co., Ltd., A-F2, 23/F, Zao Fong Universe Building, 1800 Zhong Shan Xi Road, Shanghai 200233 P. R. China Tel. (86) 21 6440 0468, ext. 316, FAX (86) 21 6440 0652 JAPAN: Microelectronics Group, Lucent Technologies Japan Ltd., 7-18, Higashi-Gotanda 2-chome, Shinagawa-ku, Tokyo 141, Japan Tel. (81) 3 5421 1600, FAX (81) 3 5421 1700 EUROPE: Data Requests: MICROELECTRONICS GROUP DATALINE: Tel. (44) 7000 582 368, FAX (44) 1189 328 148 Technical Inquiries: GERMANY: (49) 89 95086 0 (Munich), UNITED KINGDOM: (44) 1344 865 900 (Ascot), FRANCE: (33) 1 40 83 68 00 (Paris), SWEDEN: (46) 8 594 607 00 (Stockholm), FINLAND: (358) 9 4354 2800 (Helsinki), ITALY: (39) 02 6608131 (Milan), SPAIN: (34) 1 807 1441 (Madrid) Lucent Technologies Inc. reserves the right to make changes to the product(s) or information contained herein without notice. N o liability is assumed as a result of their use or application. No rights under any patent accompany the sale of any such product(s) or information. Copyright (c) 2000 Lucent Technologies Inc. All Rights Reserved April 2000 DS00-172ALC (Replaces DS99-124ALC) |
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